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authorJon Hunter <jon-hunter@ti.com>2012-07-04 03:45:53 -0600
committerPaul Walmsley <paul@pwsan.com>2012-07-04 03:45:53 -0600
commit65aa94b204dcecca01521e2a4a57e44892632b47 (patch)
treeb66136d2ca9b333a9cb4ae2283ff23381760743a /arch/arm/mach-omap2/cminst44xx.c
parent6887a4131da3adaab011613776d865f4bcfb5678 (diff)
downloadop-kernel-dev-65aa94b204dcecca01521e2a4a57e44892632b47.zip
op-kernel-dev-65aa94b204dcecca01521e2a4a57e44892632b47.tar.gz
ARM: OMAP4: clockdomain/CM code: Update supported transition modes
For OMAP3+ devices, the clock domains (CLKDMs) support one or more of the following transition modes ... NO_SLEEP (0x0) - A clock domain sleep transition is never initiated, irrespective of the hardware conditions. SW_SLEEP (0x1) - A software-forced sleep transition. The transition is initiated when the associated hardware conditions are satisfied SW_WKUP (0x2) - A software-forced clock domain wake-up transition is initiated, irrespective of the hardware conditions. HW_AUTO (0x3) - Hardware-controlled automatic sleep and wake-up transition is initiated by the PRCM module when the associated hardware conditions are satisfied. For OMAP4 devices, SW_SLEEP is equivalent to HW_AUTO and NO_SLEEP is equivalent to SW_WKUP. The only difference between HW_AUTO and SW_SLEEP for OMAP4 devices is that the PRM_IRQSTATUS_MPU.TRANSITION_ST interrupt status is set in case of SW_SLEEP transition, and not set in case of HW_AUTO transition. For OMAP4 devices, all CLKDMs support HW_AUTO and therefore we can place the CLKDMs in the HW_AUTO state instead of the SW_SLEEP mode. Hence, we do not need to use the SW_SLEEP mode. With regard to NO_SLEEP and SW_WKUP it is preferred to use SW_WKUP mode if the CLKDM supports it and so use this mode instead of NO_SLEEP where possible. For a software perspective the above 4 modes are represented by the following flags to indicate what modes are supported by each of the CLKDMs. CLKDM_CAN_DISABLE_AUTO --> NO_SLEEP CLKDM_CAN_ENABLE_AUTO --> HW_AUTO CLKDM_CAN_FORCE_SLEEP --> SW_SLEEP CLKDM_CAN_FORCE_WAKEUP --> SW_WKUP By eliminating the SW_SLEEP mode the the mapping of the flags for OMAP4 devices can becomes ... CLKDM_CAN_DISABLE_AUTO --> NO_SLEEP CLKDM_CAN_ENABLE_AUTO --> HW_AUTO CLKDM_CAN_FORCE_SLEEP --> HW_AUTO CLKDM_CAN_FORCE_WAKEUP --> SW_WKUP Cc: Ming Lei <ming.lei@canonical.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Reviewed-by: Benoit Cousson <b-cousson@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/cminst44xx.c')
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c14
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 1a39945..1894015 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -235,20 +235,6 @@ void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs)
}
/**
- * omap4_cminst_clkdm_force_sleep - try to put a clockdomain into idle
- * @part: PRCM partition ID that the clockdomain registers exist in
- * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
- *
- * Put a clockdomain referred to by (@part, @inst, @cdoffs) into idle
- * No return value.
- */
-void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs)
-{
- _clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
-}
-
-/**
* omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle
* @part: PRCM partition ID that the clockdomain registers exist in
* @inst: CM instance register offset (*_INST macro)
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