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author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-02-12 10:12:59 +0000 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-02-14 09:59:21 +0000 |
commit | 8b9dbc16d4f5786c6c930ab028722e3ed7e4285b (patch) | |
tree | d6bd11034d7d31a42275577840f5eb16b432378d /arch/arm/mach-omap2/clock.c | |
parent | 883992bd8f6924c9aa849f2dac381075e2e55a9d (diff) | |
download | op-kernel-dev-8b9dbc16d4f5786c6c930ab028722e3ed7e4285b.zip op-kernel-dev-8b9dbc16d4f5786c6c930ab028722e3ed7e4285b.tar.gz |
[ARM] omap: arrange for clock recalc methods to return the rate
linux-omap source commit 33d000c99ee393fe2042f93e8422f94976d276ce
introduces a way to "dry run" clock changes before they're committed.
However, this involves putting logic to handle this into each and
every recalc function, and unfortunately due to the caching, led to
some bugs.
Solve both of issues by making the recalc methods always return the
clock rate for the clock, which the caller decides what to do with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
-rw-r--r-- | arch/arm/mach-omap2/clock.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 1b40d75..5020cb1 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -239,11 +239,11 @@ u32 omap2_get_dpll_rate(struct clk *clk) * Used for clocks that have the same value as the parent clock, * divided by some factor */ -void omap2_fixed_divisor_recalc(struct clk *clk) +unsigned long omap2_fixed_divisor_recalc(struct clk *clk) { WARN_ON(!clk->fixed_div); - clk->rate = clk->parent->rate / clk->fixed_div; + return clk->parent->rate / clk->fixed_div; } /** @@ -449,21 +449,22 @@ err: * Used for clocks that are part of CLKSEL_xyz governed clocks. * REVISIT: Maybe change to use clk->enable() functions like on omap1? */ -void omap2_clksel_recalc(struct clk *clk) +unsigned long omap2_clksel_recalc(struct clk *clk) { + unsigned long rate; u32 div = 0; pr_debug("clock: recalc'ing clksel clk %s\n", clk->name); div = omap2_clksel_get_divisor(clk); if (div == 0) - return; + return clk->rate; - if (clk->rate == (clk->parent->rate / div)) - return; - clk->rate = clk->parent->rate / div; + rate = clk->parent->rate / div; + + pr_debug("clock: new clock rate is %ld (div %d)\n", rate, div); - pr_debug("clock: new clock rate is %ld (div %d)\n", clk->rate, div); + return rate; } /** |