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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-11-23 11:41:32 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-11-30 12:24:47 +0000 |
| commit | 10dd5ce28d78e2440e8fa1135d17e33399d75340 (patch) | |
| tree | d2e76765a57e7e47a9c424f99c3a22bf99c6da64 /arch/arm/mach-omap1 | |
| parent | 127e477e0cd8da4d3058709ab2dc7b92dccbcba5 (diff) | |
| download | op-kernel-dev-10dd5ce28d78e2440e8fa1135d17e33399d75340.zip op-kernel-dev-10dd5ce28d78e2440e8fa1135d17e33399d75340.tar.gz | |
[ARM] Remove compatibility layer for ARM irqs
set_irq_chipdata -> set_irq_chip_data
get_irq_chipdata -> get_irq_chip_data
do_level_IRQ -> handle_level_irq
do_edge_IRQ -> handle_edge_irq
do_simple_IRQ -> handle_simple_irq
irqdesc -> irq_desc
irqchip -> irq_chip
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap1')
| -rw-r--r-- | arch/arm/mach-omap1/fpga.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-omap1/irq.c | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index 8e40208..30e1881 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c @@ -84,9 +84,9 @@ static void fpga_mask_ack_irq(unsigned int irq) fpga_ack_irq(irq); } -void innovator_fpga_IRQ_demux(unsigned int irq, struct irqdesc *desc) +void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) { - struct irqdesc *d; + struct irq_desc *d; u32 stat; int fpga_irq; @@ -168,7 +168,7 @@ void omap1510_fpga_init_irq(void) set_irq_chip(i, &omap_fpga_irq); } - set_irq_handler(i, do_edge_IRQ); + set_irq_handler(i, handle_edge_irq); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 3ea140b..6383a12 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -229,7 +229,7 @@ void __init omap_init_irq(void) omap_irq_set_cfg(j, 0, 0, irq_trigger); set_irq_chip(j, &omap_irq_chip); - set_irq_handler(j, do_level_IRQ); + set_irq_handler(j, handle_level_irq); set_irq_flags(j, IRQF_VALID); } } |
