diff options
| author | Eric Bénard <eric@eukrea.com> | 2010-10-08 16:00:10 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-10-11 15:28:32 +0200 |
| commit | 67520f3a896acb1635894fd25626f7fa7c91e61c (patch) | |
| tree | adf892987b6ae02cf42fa469a106d102b53d9e2d /arch/arm/mach-mx3 | |
| parent | fdb03870a9714ba2695daa0c2b3e6b6be4318e9d (diff) | |
| download | op-kernel-dev-67520f3a896acb1635894fd25626f7fa7c91e61c.zip op-kernel-dev-67520f3a896acb1635894fd25626f7fa7c91e61c.tar.gz | |
ARM: mx35: Add mx35_revision function to query the silicon revision
Based on work done earlier by Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Eric Bénard <eric@eukrea.com>
[ukl: actually squash the two approaches together]
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx3')
| -rw-r--r-- | arch/arm/mach-mx3/clock-imx35.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-mx3/cpu.c | 27 |
2 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c index f08b407..9a10098 100644 --- a/arch/arm/mach-mx3/clock-imx35.c +++ b/arch/arm/mach-mx3/clock-imx35.c @@ -535,6 +535,9 @@ int __init mx35_clocks_init() __raw_writel(cgr2, CCM_BASE + CCM_CGR2); __raw_writel(cgr3, CCM_BASE + CCM_CGR3); + clk_enable(&iim_clk); + mx35_read_cpu_rev(); + #ifdef CONFIG_MXC_USE_EPIT epit_timer_init(&epit1_clk, MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1); diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c index 47b0573..d00a754 100644 --- a/arch/arm/mach-mx3/cpu.c +++ b/arch/arm/mach-mx3/cpu.c @@ -55,3 +55,30 @@ void __init mx31_read_cpu_rev(void) printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev); } + +unsigned int mx35_cpu_rev; +EXPORT_SYMBOL(mx35_cpu_rev); + +void __init mx35_read_cpu_rev(void) +{ + u32 rev; + char *srev = "unknown"; + + rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); + switch (rev) { + case 0x00: + mx35_cpu_rev = MX3x_CHIP_REV_1_0; + srev = "1.0"; + break; + case 0x10: + mx35_cpu_rev = MX3x_CHIP_REV_2_0; + srev = "2.0"; + break; + case 0x11: + mx35_cpu_rev = MX3x_CHIP_REV_2_1; + srev = "2.1"; + break; + } + + printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev); +} |
