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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2011-03-17 09:40:29 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2011-05-19 13:11:38 +0200
commit27ad4bf72a27c80c121b2349174e6b41b2e3afd8 (patch)
tree864ddd4e58386f22c9fda4457ebc5bb23d790792 /arch/arm/mach-mx3/cpu.c
parent7fc92c6092d7208e53d35cda32a9181aae396adf (diff)
downloadop-kernel-dev-27ad4bf72a27c80c121b2349174e6b41b2e3afd8.zip
op-kernel-dev-27ad4bf72a27c80c121b2349174e6b41b2e3afd8.tar.gz
ARM: imx: move mx3 support to mach-imx
Fixing a few "please, no space before tabs" and "empty line at end of file" warnings on the way. LAKML-Reference: 1299271882-2130-6-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx3/cpu.c')
-rw-r--r--arch/arm/mach-mx3/cpu.c89
1 files changed, 0 insertions, 89 deletions
diff --git a/arch/arm/mach-mx3/cpu.c b/arch/arm/mach-mx3/cpu.c
deleted file mode 100644
index d1d3395..0000000
--- a/arch/arm/mach-mx3/cpu.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * MX3 CPU type detection
- *
- * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/module.h>
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/iim.h>
-
-unsigned int mx31_cpu_rev;
-EXPORT_SYMBOL(mx31_cpu_rev);
-
-struct mx3_cpu_type {
- u8 srev;
- const char *name;
- const char *v;
- unsigned int rev;
-};
-
-static struct mx3_cpu_type mx31_cpu_type[] __initdata = {
- { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = IMX_CHIP_REVISION_1_0 },
- { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 },
- { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 },
- { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 },
- { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 },
- { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 },
- { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 },
- { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 },
- { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 },
-};
-
-void __init mx31_read_cpu_rev(void)
-{
- u32 i, srev;
-
- /* read SREV register from IIM module */
- srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
-
- for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
- if (srev == mx31_cpu_type[i].srev) {
- printk(KERN_INFO
- "CPU identified as %s, silicon rev %s\n",
- mx31_cpu_type[i].name, mx31_cpu_type[i].v);
-
- mx31_cpu_rev = mx31_cpu_type[i].rev;
- return;
- }
-
- mx31_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
-
- printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev);
-}
-
-unsigned int mx35_cpu_rev;
-EXPORT_SYMBOL(mx35_cpu_rev);
-
-void __init mx35_read_cpu_rev(void)
-{
- u32 rev;
- char *srev;
-
- rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
- switch (rev) {
- case 0x00:
- mx35_cpu_rev = IMX_CHIP_REVISION_1_0;
- srev = "1.0";
- break;
- case 0x10:
- mx35_cpu_rev = IMX_CHIP_REVISION_2_0;
- srev = "2.0";
- break;
- case 0x11:
- mx35_cpu_rev = IMX_CHIP_REVISION_2_1;
- srev = "2.1";
- break;
- default:
- mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
- srev = "unknown";
- }
-
- printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
-}
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