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authorStephen Warren <swarren@nvidia.com>2014-03-20 18:06:01 -0600
committerArnd Bergmann <arnd@arndb.de>2014-03-26 23:13:16 +0100
commitbf5fd5bf0a96a8bbc9c073118fc646bae13e24bd (patch)
tree41392d900caa2c2d5e8dcdde61fe38b1bee36dac /arch/arm/mach-moxart
parent27addb96db38fc7279fcd40f9df10438f5dc8f2e (diff)
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ARM: tegra: fix board DT pinmux setup
Neither Tegra114 nor Tegra124 allow "low power mode" to be configured on SDIO1 or SDIO3 drive groups. Remove the attempt to configure that option from the Dalmore and Venice2 DTs. The Venice2 DT contained duplicate configurations for most sdmmc1_* pins. Remove the duplicate pins from one of the nodes, and fix the configuration since the remaining clk pin is output-only. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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