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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-01 18:19:05 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-01 18:19:05 -0700
commit61464c8357c8f6b780e4c44f5c79471799c51ca7 (patch)
tree4509cf075403965528f380f2f825c46908fb7d4e /arch/arm/mach-mmp/mmp2.c
parent47061eda2584b9e4516d1e3a9713406a3a559ac8 (diff)
parent9cf1c871526cf6bfec2a653e1e068ee72592542c (diff)
downloadop-kernel-dev-61464c8357c8f6b780e4c44f5c79471799c51ca7.zip
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Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc general cleanups from Olof Johansson: "This is a large branch that contains a handful of different cleanups: - Fixing up the I/O space remapping on PCI on ARM. This is a series from Rob Herring that restructures how all pci devices allocate I/O space, and it's part of the work to allow multiplatform kernels. - A number of cleanup series for OMAP, moving and removing some headers, sparse irq rework and in general preparation for multiplatform. - Final removal of all non-DT boards for Tegra, it is now device-tree-only! - Removal of a stale platform, nxp4008. It's an old mobile chipset that is no longer in use, and was very likely never really used with a mainline kernel. We have not been able to find anyone interested in keeping it around in the kernel. - Removal of the legacy dmaengine driver on tegra + A handful of other things that I haven't described above." Fix up some conflicts with the staging tree (and because nxp4008 was removed) * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (184 commits) ARM: OMAP2+: serial: Change MAX_HSUART_PORTS to 6 ARM: OMAP4: twl-common: Support for additional devices on i2c1 bus ARM: mmp: using for_each_set_bit to simplify the code ARM: tegra: harmony: fix ldo7 regulator-name ARM: OMAP2+: Make omap4-keypad.h local ARM: OMAP2+: Make l4_3xxx.h local ARM: OMAP2+: Make l4_2xxx.h local ARM: OMAP2+: Make l3_3xxx.h local ARM: OMAP2+: Make l3_2xxx.h local ARM: OMAP1: Move irda.h from plat to mach ARM: OMAP2+: Make hdq1w.h local ARM: OMAP2+: Make gpmc-smsc911x.h local ARM: OMAP2+: Make gpmc-smc91x.h local ARM: OMAP1: Move flash.h from plat to mach ARM: OMAP2+: Make debug-devices.h local ARM: OMAP1: Move board-voiceblue.h from plat to mach ARM: OMAP1: Move board-sx1.h from plat to mach ARM: OMAP2+: Make omap-wakeupgen.h local ARM: OMAP2+: Make omap-secure.h local ARM: OMAP2+: Make ctrl_module_wkup_44xx.h local ...
Diffstat (limited to 'arch/arm/mach-mmp/mmp2.c')
-rw-r--r--arch/arm/mach-mmp/mmp2.c71
1 files changed, 5 insertions, 66 deletions
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index c709a24..c2ce3d0 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -20,7 +20,6 @@
#include <asm/mach/time.h>
#include <mach/addr-map.h>
#include <mach/regs-apbc.h>
-#include <mach/regs-apmu.h>
#include <mach/cputype.h>
#include <mach/irqs.h>
#include <mach/dma.h>
@@ -29,7 +28,6 @@
#include <mach/mmp2.h>
#include "common.h"
-#include "clock.h"
#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
@@ -98,67 +96,6 @@ void __init mmp2_init_irq(void)
mmp2_init_icu();
}
-static void sdhc_clk_enable(struct clk *clk)
-{
- uint32_t clk_rst;
-
- clk_rst = __raw_readl(clk->clk_rst);
- clk_rst |= clk->enable_val;
- __raw_writel(clk_rst, clk->clk_rst);
-}
-
-static void sdhc_clk_disable(struct clk *clk)
-{
- uint32_t clk_rst;
-
- clk_rst = __raw_readl(clk->clk_rst);
- clk_rst &= ~clk->enable_val;
- __raw_writel(clk_rst, clk->clk_rst);
-}
-
-struct clkops sdhc_clk_ops = {
- .enable = sdhc_clk_enable,
- .disable = sdhc_clk_disable,
-};
-
-/* APB peripheral clocks */
-static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
-static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);
-static APBC_CLK(uart3, MMP2_UART3, 1, 26000000);
-static APBC_CLK(uart4, MMP2_UART4, 1, 26000000);
-static APBC_CLK(twsi1, MMP2_TWSI1, 0, 26000000);
-static APBC_CLK(twsi2, MMP2_TWSI2, 0, 26000000);
-static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
-static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
-static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
-static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
-static APBC_CLK(gpio, MMP2_GPIO, 0, 26000000);
-
-static APMU_CLK(nand, NAND, 0xbf, 100000000);
-static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
-static APMU_CLK_OPS(sdh1, SDH1, 0x1b, 200000000, &sdhc_clk_ops);
-static APMU_CLK_OPS(sdh2, SDH2, 0x1b, 200000000, &sdhc_clk_ops);
-static APMU_CLK_OPS(sdh3, SDH3, 0x1b, 200000000, &sdhc_clk_ops);
-
-static struct clk_lookup mmp2_clkregs[] = {
- INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
- INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
- INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
- INIT_CLKREG(&clk_uart4, "pxa2xx-uart.3", NULL),
- INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.0", NULL),
- INIT_CLKREG(&clk_twsi2, "pxa2xx-i2c.1", NULL),
- INIT_CLKREG(&clk_twsi3, "pxa2xx-i2c.2", NULL),
- INIT_CLKREG(&clk_twsi4, "pxa2xx-i2c.3", NULL),
- INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
- INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
- INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
- INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
- INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"),
- INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"),
- INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"),
- INIT_CLKREG(&clk_sdh3, "sdhci-pxav3.3", "PXA-SDHCLK"),
-};
-
static int __init mmp2_init(void)
{
if (cpu_is_mmp2()) {
@@ -168,25 +105,27 @@ static int __init mmp2_init(void)
mfp_init_base(MFPR_VIRT_BASE);
mfp_init_addr(mmp2_addr_map);
pxa_init_dma(IRQ_MMP2_DMA_RIQ, 16);
- clkdev_add_table(ARRAY_AND_SIZE(mmp2_clkregs));
+ mmp2_clk_init();
}
return 0;
}
postcore_initcall(mmp2_init);
+#define APBC_TIMERS APBC_REG(0x024)
+
static void __init mmp2_timer_init(void)
{
unsigned long clk_rst;
- __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS);
+ __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
/*
* enable bus/functional clock, enable 6.5MHz (divider 4),
* release reset
*/
clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
- __raw_writel(clk_rst, APBC_MMP2_TIMERS);
+ __raw_writel(clk_rst, APBC_TIMERS);
timer_init(IRQ_MMP2_TIMER1);
}
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