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| author | NeilBrown <neilb@suse.com> | 2015-09-05 11:07:04 +0200 |
|---|---|---|
| committer | NeilBrown <neilb@suse.com> | 2015-09-05 11:08:32 +0200 |
| commit | e89c6fdf9e0eb1b5a03574d4ca73e83eae8deb91 (patch) | |
| tree | f9df292ed03a5a3c4ddc658ae3646f02a1ffafce /arch/arm/mach-ks8695/time.c | |
| parent | c3cce6cda162eb2b2960a85d9c8992f4f3be85d0 (diff) | |
| parent | 1081230b748de8f03f37f80c53dfa89feda9b8de (diff) | |
| download | op-kernel-dev-e89c6fdf9e0eb1b5a03574d4ca73e83eae8deb91.zip op-kernel-dev-e89c6fdf9e0eb1b5a03574d4ca73e83eae8deb91.tar.gz | |
Merge linux-block/for-4.3/core into md/for-linux
There were a few conflicts that are fairly easy to resolve.
Signed-off-by: NeilBrown <neilb@suse.com>
Diffstat (limited to 'arch/arm/mach-ks8695/time.c')
| -rw-r--r-- | arch/arm/mach-ks8695/time.c | 43 |
1 files changed, 21 insertions, 22 deletions
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c index a197874..18eb0fb 100644 --- a/arch/arm/mach-ks8695/time.c +++ b/arch/arm/mach-ks8695/time.c @@ -54,28 +54,25 @@ /* Timer0 Timeout Counter Register */ #define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */ -static void ks8695_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) +static int ks8695_set_periodic(struct clock_event_device *evt) { + u32 rate = DIV_ROUND_CLOSEST(KS8695_CLOCK_RATE, HZ); + u32 half = DIV_ROUND_CLOSEST(rate, 2); u32 tmcon; - if (mode == CLOCK_EVT_FEAT_PERIODIC) { - u32 rate = DIV_ROUND_CLOSEST(KS8695_CLOCK_RATE, HZ); - u32 half = DIV_ROUND_CLOSEST(rate, 2); - - /* Disable timer 1 */ - tmcon = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON); - tmcon &= ~TMCON_T1EN; - writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); + /* Disable timer 1 */ + tmcon = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON); + tmcon &= ~TMCON_T1EN; + writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); - /* Both registers need to count down */ - writel_relaxed(half, KS8695_TMR_VA + KS8695_T1TC); - writel_relaxed(half, KS8695_TMR_VA + KS8695_T1PD); + /* Both registers need to count down */ + writel_relaxed(half, KS8695_TMR_VA + KS8695_T1TC); + writel_relaxed(half, KS8695_TMR_VA + KS8695_T1PD); - /* Re-enable timer1 */ - tmcon |= TMCON_T1EN; - writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); - } + /* Re-enable timer1 */ + tmcon |= TMCON_T1EN; + writel_relaxed(tmcon, KS8695_TMR_VA + KS8695_TMCON); + return 0; } static int ks8695_set_next_event(unsigned long cycles, @@ -102,11 +99,13 @@ static int ks8695_set_next_event(unsigned long cycles, } static struct clock_event_device clockevent_ks8695 = { - .name = "ks8695_t1tc", - .rating = 300, /* Reasonably fast and accurate clock event */ - .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, - .set_next_event = ks8695_set_next_event, - .set_mode = ks8695_set_mode, + .name = "ks8695_t1tc", + /* Reasonably fast and accurate clock event */ + .rating = 300, + .features = CLOCK_EVT_FEAT_ONESHOT | + CLOCK_EVT_FEAT_PERIODIC, + .set_next_event = ks8695_set_next_event, + .set_state_periodic = ks8695_set_periodic, }; /* |
