summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-integrator/include
diff options
context:
space:
mode:
authorLinus Walleij <linus.walleij@linaro.org>2012-04-28 14:33:47 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-05-04 16:53:37 +0100
commit3108e6ab21a9b9dbd88f0b2ff99f73e95b8b1580 (patch)
tree9e87e1e4196849090103317d109dc95ba9d159f8 /arch/arm/mach-integrator/include
parent69964ea4c7b68c9399f7977aa5b9aa6539a6a98a (diff)
downloadop-kernel-dev-3108e6ab21a9b9dbd88f0b2ff99f73e95b8b1580.zip
op-kernel-dev-3108e6ab21a9b9dbd88f0b2ff99f73e95b8b1580.tar.gz
ARM: 7389/2: plat-versatile: modernize FPGA IRQ controller
This does two things to the FPGA IRQ controller in the versatile family: - Convert to MULTI_IRQ_HANDLER so we can drop the entry macro from the Integrator. The C IRQ handler was inspired from arch/arm/common/vic.c, recent bug discovered in this handler was accounted for. - Convert to using IRQ domains so we can get rid of the NO_IRQ mess and proceed with device tree and such stuff. As part of the exercise, bump all the low IRQ numbers on the Integrator PIC to start from 1 rather than 0, since IRQ 0 is now NO_IRQ. The Linux IRQ numbers are thus entirely decoupled from the hardware IRQ numbers in this controller. I was unable to split this patch. The main reason is the half-done conversion to device tree in Versatile. Tested on Integrator/AP and Integrator/CP. Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-integrator/include')
-rw-r--r--arch/arm/mach-integrator/include/mach/entry-macro.S39
-rw-r--r--arch/arm/mach-integrator/include/mach/irqs.h63
2 files changed, 31 insertions, 71 deletions
diff --git a/arch/arm/mach-integrator/include/mach/entry-macro.S b/arch/arm/mach-integrator/include/mach/entry-macro.S
deleted file mode 100644
index 5cc7b85..0000000
--- a/arch/arm/mach-integrator/include/mach/entry-macro.S
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * arch/arm/mach-integrator/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for Integrator platforms
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <mach/hardware.h>
-#include <mach/platform.h>
-#include <mach/irqs.h>
-
- .macro get_irqnr_preamble, base, tmp
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-/* FIXME: should not be using soo many LDRs here */
- ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE)
- mov \irqnr, #IRQ_PIC_START
- ldr \irqstat, [\base, #IRQ_STATUS] @ get masked status
- ldr \base, =IO_ADDRESS(INTEGRATOR_HDR_BASE)
- teq \irqstat, #0
- ldreq \irqstat, [\base, #(INTEGRATOR_HDR_IC_OFFSET+IRQ_STATUS)]
- moveq \irqnr, #IRQ_CIC_START
-
-1001: tst \irqstat, #15
- bne 1002f
- add \irqnr, \irqnr, #4
- movs \irqstat, \irqstat, lsr #4
- bne 1001b
-1002: tst \irqstat, #1
- bne 1003f
- add \irqnr, \irqnr, #1
- movs \irqstat, \irqstat, lsr #1
- bne 1002b
-1003: /* EQ will be set if no irqs pending */
- .endm
-
diff --git a/arch/arm/mach-integrator/include/mach/irqs.h b/arch/arm/mach-integrator/include/mach/irqs.h
index a19a1a2..7371018 100644
--- a/arch/arm/mach-integrator/include/mach/irqs.h
+++ b/arch/arm/mach-integrator/include/mach/irqs.h
@@ -22,37 +22,37 @@
/*
* Interrupt numbers
*/
-#define IRQ_PIC_START 0
-#define IRQ_SOFTINT 0
-#define IRQ_UARTINT0 1
-#define IRQ_UARTINT1 2
-#define IRQ_KMIINT0 3
-#define IRQ_KMIINT1 4
-#define IRQ_TIMERINT0 5
-#define IRQ_TIMERINT1 6
-#define IRQ_TIMERINT2 7
-#define IRQ_RTCINT 8
-#define IRQ_AP_EXPINT0 9
-#define IRQ_AP_EXPINT1 10
-#define IRQ_AP_EXPINT2 11
-#define IRQ_AP_EXPINT3 12
-#define IRQ_AP_PCIINT0 13
-#define IRQ_AP_PCIINT1 14
-#define IRQ_AP_PCIINT2 15
-#define IRQ_AP_PCIINT3 16
-#define IRQ_AP_V3INT 17
-#define IRQ_AP_CPINT0 18
-#define IRQ_AP_CPINT1 19
-#define IRQ_AP_LBUSTIMEOUT 20
-#define IRQ_AP_APCINT 21
-#define IRQ_CP_CLCDCINT 22
-#define IRQ_CP_MMCIINT0 23
-#define IRQ_CP_MMCIINT1 24
-#define IRQ_CP_AACIINT 25
-#define IRQ_CP_CPPLDINT 26
-#define IRQ_CP_ETHINT 27
-#define IRQ_CP_TSPENINT 28
-#define IRQ_PIC_END 31
+#define IRQ_PIC_START 1
+#define IRQ_SOFTINT 1
+#define IRQ_UARTINT0 2
+#define IRQ_UARTINT1 3
+#define IRQ_KMIINT0 4
+#define IRQ_KMIINT1 5
+#define IRQ_TIMERINT0 6
+#define IRQ_TIMERINT1 7
+#define IRQ_TIMERINT2 8
+#define IRQ_RTCINT 9
+#define IRQ_AP_EXPINT0 10
+#define IRQ_AP_EXPINT1 11
+#define IRQ_AP_EXPINT2 12
+#define IRQ_AP_EXPINT3 13
+#define IRQ_AP_PCIINT0 14
+#define IRQ_AP_PCIINT1 15
+#define IRQ_AP_PCIINT2 16
+#define IRQ_AP_PCIINT3 17
+#define IRQ_AP_V3INT 18
+#define IRQ_AP_CPINT0 19
+#define IRQ_AP_CPINT1 20
+#define IRQ_AP_LBUSTIMEOUT 21
+#define IRQ_AP_APCINT 22
+#define IRQ_CP_CLCDCINT 23
+#define IRQ_CP_MMCIINT0 24
+#define IRQ_CP_MMCIINT1 25
+#define IRQ_CP_AACIINT 26
+#define IRQ_CP_CPPLDINT 27
+#define IRQ_CP_ETHINT 28
+#define IRQ_CP_TSPENINT 29
+#define IRQ_PIC_END 29
#define IRQ_CIC_START 32
#define IRQ_CM_SOFTINT 32
@@ -80,4 +80,3 @@
#define NR_IRQS_INTEGRATOR_AP 34
#define NR_IRQS_INTEGRATOR_CP 47
-
OpenPOWER on IntegriCloud