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| author | Thomas Gleixner <tglx@linutronix.de> | 2009-07-03 08:44:46 -0500 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2011-09-13 11:12:14 +0200 |
| commit | bd31b85960a7fcb2d7ede216460b8da71a88411c (patch) | |
| tree | f2ab1a1105705856c5cdfc71bcf3f7b5f897d30d /arch/arm/mach-integrator/core.c | |
| parent | a1741e7fcbc19a67520115df480ab17012cc3d0b (diff) | |
| download | op-kernel-dev-bd31b85960a7fcb2d7ede216460b8da71a88411c.zip op-kernel-dev-bd31b85960a7fcb2d7ede216460b8da71a88411c.tar.gz | |
locking, ARM: Annotate low level hw locks as raw
Annotate the low level hardware locks which must not be preempted.
In mainline this change documents the low level nature of
the lock - otherwise there's no functional difference. Lockdep
and Sparse checking will work as usual.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mach-integrator/core.c')
| -rw-r--r-- | arch/arm/mach-integrator/core.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 77315b9..0c20cf6 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c @@ -205,7 +205,7 @@ static struct amba_pl010_data integrator_uart_data = { #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL) -static DEFINE_SPINLOCK(cm_lock); +static DEFINE_RAW_SPINLOCK(cm_lock); /** * cm_control - update the CM_CTRL register. @@ -217,10 +217,10 @@ void cm_control(u32 mask, u32 set) unsigned long flags; u32 val; - spin_lock_irqsave(&cm_lock, flags); + raw_spin_lock_irqsave(&cm_lock, flags); val = readl(CM_CTRL) & ~mask; writel(val | set, CM_CTRL); - spin_unlock_irqrestore(&cm_lock, flags); + raw_spin_unlock_irqrestore(&cm_lock, flags); } EXPORT_SYMBOL(cm_control); |
