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| author | Jason Liu <jason.hui@linaro.org> | 2011-08-26 13:35:22 +0800 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-08-26 08:50:59 +0200 |
| commit | 8d75a2620dc3e33ce504044c375c443ed7ed4128 (patch) | |
| tree | 1417a2339770f8119c6a92ad40d61b670210bad6 /arch/arm/mach-imx | |
| parent | ab116a86faf6aeafd0acf766c0c5d9475bf8493e (diff) | |
| download | op-kernel-dev-8d75a2620dc3e33ce504044c375c443ed7ed4128.zip op-kernel-dev-8d75a2620dc3e33ce504044c375c443ed7ed4128.tar.gz | |
ARM: mx35: use generic function for displaying silicon revision
update to use generic function for displaying silicon revision
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/clock-imx35.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-imx/cpu-imx35.c | 30 |
2 files changed, 16 insertions, 17 deletions
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c index 88b62a07..abf30d4 100644 --- a/arch/arm/mach-imx/clock-imx35.c +++ b/arch/arm/mach-imx/clock-imx35.c @@ -537,7 +537,8 @@ int __init mx35_clocks_init() __raw_writel(cgr3, CCM_BASE + CCM_CGR3); clk_enable(&iim_clk); - mx35_read_cpu_rev(); + imx_print_silicon_rev("i.MX35", mx35_revision()); + clk_disable(&iim_clk); #ifdef CONFIG_MXC_USE_EPIT epit_timer_init(&epit1_clk, diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c index 6637cd8..846e46e 100644 --- a/arch/arm/mach-imx/cpu-imx35.c +++ b/arch/arm/mach-imx/cpu-imx35.c @@ -13,32 +13,30 @@ #include <mach/hardware.h> #include <mach/iim.h> -unsigned int mx35_cpu_rev; -EXPORT_SYMBOL(mx35_cpu_rev); +static int mx35_cpu_rev = -1; -void __init mx35_read_cpu_rev(void) +static int mx35_read_cpu_rev(void) { u32 rev; - char *srev; rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); switch (rev) { case 0x00: - mx35_cpu_rev = IMX_CHIP_REVISION_1_0; - srev = "1.0"; - break; + return IMX_CHIP_REVISION_1_0; case 0x10: - mx35_cpu_rev = IMX_CHIP_REVISION_2_0; - srev = "2.0"; - break; + return IMX_CHIP_REVISION_2_0; case 0x11: - mx35_cpu_rev = IMX_CHIP_REVISION_2_1; - srev = "2.1"; - break; + return IMX_CHIP_REVISION_2_1; default: - mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN; - srev = "unknown"; + return IMX_CHIP_REVISION_UNKNOWN; } +} + +int mx35_revision(void) +{ + if (mx35_cpu_rev == -1) + mx35_cpu_rev = mx35_read_cpu_rev(); - printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev); + return mx35_cpu_rev; } +EXPORT_SYMBOL(mx35_revision); |
