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author | Shawn Guo <shawn.guo@linaro.org> | 2013-08-13 13:54:02 +0800 |
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committer | Shawn Guo <shawn.guo@linaro.org> | 2013-10-21 09:11:08 +0800 |
commit | bfefdff8f91aa0a9ff1291d18d54498af276a6e5 (patch) | |
tree | 39221aa63175486fbf84eced72e09ede164b2dc8 /arch/arm/mach-imx | |
parent | c7c3eac6277bc60fb4472a16c5af5d54afc83596 (diff) | |
download | op-kernel-dev-bfefdff8f91aa0a9ff1291d18d54498af276a6e5.zip op-kernel-dev-bfefdff8f91aa0a9ff1291d18d54498af276a6e5.tar.gz |
ARM: imx: add soc revision helper functions
Similar to what we do for cpu type, the patch adds helper functions
imx_set_soc_revision() and imx_get_soc_revision() to maintain
imx_soc_revision in cpu.c.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r-- | arch/arm/mach-imx/common.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-imx/cpu.c | 12 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 28e8ca0..6ac25f6 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -77,6 +77,8 @@ extern int imx6q_revision(void); extern int mx53_display_revision(void); extern void imx_set_aips(void __iomem *); extern int mxc_device_init(void); +void imx_set_soc_revision(unsigned int rev); +unsigned int imx_get_soc_revision(void); enum mxc_cpu_pwr_mode { WAIT_CLOCKED, /* wfi only */ diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index e70e3ac..51f6c51 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -8,11 +8,23 @@ unsigned int __mxc_cpu_type; EXPORT_SYMBOL(__mxc_cpu_type); +static unsigned int imx_soc_revision; + void mxc_set_cpu_type(unsigned int type) { __mxc_cpu_type = type; } +void imx_set_soc_revision(unsigned int rev) +{ + imx_soc_revision = rev; +} + +unsigned int imx_get_soc_revision(void) +{ + return imx_soc_revision; +} + void imx_print_silicon_rev(const char *cpu, int srev) { if (srev == IMX_CHIP_REVISION_UNKNOWN) |