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| author | Anson Huang <Anson.Huang@nxp.com> | 2016-08-29 21:49:57 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2016-08-29 22:39:27 +0800 |
| commit | 6ae44aa651d0d82097cb5379be94e86beade9c7b (patch) | |
| tree | ff68da5891bbc5779908004ef2a01b4180791adc /arch/arm/mach-imx | |
| parent | 8765caa5cb6054247832947119ea533b5d410d2b (diff) | |
| download | op-kernel-dev-6ae44aa651d0d82097cb5379be94e86beade9c7b.zip op-kernel-dev-6ae44aa651d0d82097cb5379be94e86beade9c7b.tar.gz | |
ARM: imx: enable WAIT mode hardware workaround for imx6sx
Need to enable INT_MEM_CLK_LPM bit in CCM_CGPR for WAIT mode,
without this bit set, if there is pending interrupt during
ARM platform entering WAIT mode without power gating, cache
data will be corrupted, this is a hardware workaround for WAIT
mode and must be enabled.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/cpuidle-imx6sx.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach-imx/cpuidle-imx6sx.c index 3c6672b..261aaa4 100644 --- a/arch/arm/mach-imx/cpuidle-imx6sx.c +++ b/arch/arm/mach-imx/cpuidle-imx6sx.c @@ -90,6 +90,7 @@ static struct cpuidle_driver imx6sx_cpuidle_driver = { int __init imx6sx_cpuidle_init(void) { + imx6_set_int_mem_clk_lpm(true); imx6_enable_rbc(false); /* * set ARM power up/down timing to the fastest, |
