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authorArnd Bergmann <arnd@arndb.de>2011-11-02 02:46:55 +0100
committerArnd Bergmann <arnd@arndb.de>2011-11-02 02:46:55 +0100
commitabc3f126ac736280c68db6472eb0040ddf6e1b1f (patch)
tree4e3333cde6da6c49dcd81920410bf5a33055f03a /arch/arm/mach-imx/pm-imx6q.c
parentb8df0ea26ac17c9a073f235c7fdfbdd1851b59ea (diff)
parent8bcb97659656042f3132b2814b19709856aa1335 (diff)
downloadop-kernel-dev-abc3f126ac736280c68db6472eb0040ddf6e1b1f.zip
op-kernel-dev-abc3f126ac736280c68db6472eb0040ddf6e1b1f.tar.gz
Merge branch 'imx/imx6q' into next/soc
Conflicts: Documentation/devicetree/bindings/arm/fsl.txt arch/arm/Kconfig arch/arm/Kconfig.debug arch/arm/plat-mxc/include/mach/common.h
Diffstat (limited to 'arch/arm/mach-imx/pm-imx6q.c')
-rw-r--r--arch/arm/mach-imx/pm-imx6q.c70
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c
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--- /dev/null
+++ b/arch/arm/mach-imx/pm-imx6q.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/suspend.h>
+#include <asm/cacheflush.h>
+#include <asm/proc-fns.h>
+#include <asm/suspend.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <mach/common.h>
+#include <mach/hardware.h>
+
+extern unsigned long phys_l2x0_saved_regs;
+
+static int imx6q_suspend_finish(unsigned long val)
+{
+ cpu_do_idle();
+ return 0;
+}
+
+static int imx6q_pm_enter(suspend_state_t state)
+{
+ switch (state) {
+ case PM_SUSPEND_MEM:
+ imx6q_set_lpm(STOP_POWER_OFF);
+ imx_gpc_pre_suspend();
+ imx_set_cpu_jump(0, v7_cpu_resume);
+ /* Zzz ... */
+ cpu_suspend(0, imx6q_suspend_finish);
+ imx_smp_prepare();
+ imx_gpc_post_resume();
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct platform_suspend_ops imx6q_pm_ops = {
+ .enter = imx6q_pm_enter,
+ .valid = suspend_valid_only_mem,
+};
+
+void __init imx6q_pm_init(void)
+{
+ /*
+ * The l2x0 core code provides an infrastucture to save and restore
+ * l2x0 registers across suspend/resume cycle. But because imx6q
+ * retains L2 content during suspend and needs to resume L2 before
+ * MMU is enabled, it can only utilize register saving support and
+ * have to take care of restoring on its own. So we save physical
+ * address of the data structure used by l2x0 core to save registers,
+ * and later restore the necessary ones in imx6q resume entry.
+ */
+ phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
+
+ suspend_set_ops(&imx6q_pm_ops);
+}
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