diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2013-06-20 17:34:32 +0200 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2013-08-16 13:11:19 +0800 |
commit | 12da484485b0ae0cd1588ade3904c1f647ab58cd (patch) | |
tree | f993c56e6259b366b95197b6e9a30550e188e5ae /arch/arm/mach-imx/mach-imx6q.c | |
parent | 14078291d89b9a1294618b649c856f4de9ef642f (diff) | |
download | op-kernel-dev-12da484485b0ae0cd1588ade3904c1f647ab58cd.zip op-kernel-dev-12da484485b0ae0cd1588ade3904c1f647ab58cd.tar.gz |
ARM: i.MX6: add ethernet phy fixup for AR8031
The AR8031 is used on the i.MX6 based sabreSD, sabreauto and wandboard.
All need the same fixup, so add it for all i.MX6.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/mach-imx6q.c')
-rw-r--r-- | arch/arm/mach-imx/mach-imx6q.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 7f23846..57f350c 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -115,6 +115,29 @@ static int ksz9021rn_phy_fixup(struct phy_device *phydev) return 0; } +static int ar8031_phy_fixup(struct phy_device *dev) +{ + u16 val; + + /* To enable AR8031 output a 125MHz clk from CLK_25M */ + phy_write(dev, 0xd, 0x7); + phy_write(dev, 0xe, 0x8016); + phy_write(dev, 0xd, 0x4007); + + val = phy_read(dev, 0xe); + val &= 0xffe3; + val |= 0x18; + phy_write(dev, 0xe, val); + + /* introduce tx clock delay */ + phy_write(dev, 0x1d, 0x5); + val = phy_read(dev, 0x1e); + val |= 0x0100; + phy_write(dev, 0x1e, val); + + return 0; +} + static void __init imx6q_sabrelite_cko1_setup(void) { struct clk *cko1_sel, *ahb, *cko1; @@ -139,11 +162,15 @@ put_clk: clk_put(cko1); } +#define PHY_ID_AR8031 0x004dd074 + static void __init imx6q_enet_phy_init(void) { if (IS_BUILTIN(CONFIG_PHYLIB)) { phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, ksz9021rn_phy_fixup); + phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff, + ar8031_phy_fixup); } } |