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authorOlof Johansson <olof@lixom.net>2014-01-02 12:10:12 -0800
committerOlof Johansson <olof@lixom.net>2014-01-02 12:10:12 -0800
commite05f9ac42c1b87a1a266e3e83191ed00211576bc (patch)
treeb1c28ec3b64d5f752c97fd4ac93483cb2be19ed7 /arch/arm/mach-imx/mach-imx6q.c
parentc655479ab89cfad17a773cb55b57199c19f65e9b (diff)
parent48c95841110036a95840c6782f27d841ead9a583 (diff)
downloadop-kernel-dev-e05f9ac42c1b87a1a266e3e83191ed00211576bc.zip
op-kernel-dev-e05f9ac42c1b87a1a266e3e83191ed00211576bc.tar.gz
Merge tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo: i.MX SoC changes for 3.14: - Add the initial i.MX50 SoC support - Support device tree boot for i.MX35 - Move imx5 clock driver to use macros for clock ID - Some random updates and non-critical fixes on clock drivers - A few defconfig updates and minor cleanups * tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6: (37 commits) ARM: imx: improve the comment of CCM lpm SW workaround ARM: imx: improve status check of clock gate ARM: imx: add necessary interface for pfd ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100 ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support ARM: imx: Add cpu frequency scaling support ARM i.MX35: Add devicetree support. ARM: imx: update imx_v6_v7_defconfig ARM: imx6sl: Add missing spba clock to clock tree ARM: imx6sl: Add missing pll4_audio_div to the clock tree ARM: imx6: Derive spdif clock from pll3_pfd3_454m ARM: imx: use __initconst for const init definition ARM i.MX5: fix obvious typo in ldb_di0_gate clk definition ARM i.MX5: set CAN peripheral clock to 24 MHz parent ARM: imx: pllv1: Fix PLL calculation for i.MX27 ARM i.MX5: fix "shift" value for lp_apm_sel on i.MX50 and i.MX53 ARM: imx: imx53: Add SATA PHY clock ARM: imx_v6_v7_defconfig: Enable STMPE touchscreen ARM: imx: rename IMX6SL_CLK_CLK_END to IMX6SL_CLK_END ARM: imx: select PINCTRL at sub-architecure level ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-imx/mach-imx6q.c')
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c32
1 files changed, 31 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index d0cfb22..d2ea6e6 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -13,6 +13,7 @@
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/cpu.h>
+#include <linux/delay.h>
#include <linux/export.h>
#include <linux/init.h>
#include <linux/io.h>
@@ -23,6 +24,7 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/pm_opp.h>
+#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/reboot.h>
#include <linux/regmap.h>
@@ -78,6 +80,34 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev)
return 0;
}
+/*
+ * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
+ * as they are used for slots1-7 PERST#
+ */
+static void ventana_pciesw_early_fixup(struct pci_dev *dev)
+{
+ u32 dw;
+
+ if (!of_machine_is_compatible("gw,ventana"))
+ return;
+
+ if (dev->devfn != 0)
+ return;
+
+ pci_read_config_dword(dev, 0x62c, &dw);
+ dw |= 0xaaa8; // GPIO1-7 outputs
+ pci_write_config_dword(dev, 0x62c, dw);
+
+ pci_read_config_dword(dev, 0x644, &dw);
+ dw |= 0xfe; // GPIO1-7 output high
+ pci_write_config_dword(dev, 0x644, dw);
+
+ msleep(100);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, ventana_pciesw_early_fixup);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, ventana_pciesw_early_fixup);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, ventana_pciesw_early_fixup);
+
static int ar8031_phy_fixup(struct phy_device *dev)
{
u16 val;
@@ -243,7 +273,7 @@ static void __init imx6q_init_irq(void)
irqchip_init();
}
-static const char *imx6q_dt_compat[] __initdata = {
+static const char *imx6q_dt_compat[] __initconst = {
"fsl,imx6dl",
"fsl,imx6q",
NULL,
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