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author | Olof Johansson <olof@lixom.net> | 2013-02-04 22:24:20 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2013-02-04 22:24:20 -0800 |
commit | 4227961650884a06757f80877d5dce0bddc723d4 (patch) | |
tree | 122c7929b81c685c85764b1d7ae227f8a7362d60 /arch/arm/mach-imx/gpc.c | |
parent | ef4acb75a019783fc5132a5066232ef80209d7ec (diff) | |
parent | e5f9dec8ff5ff3f6254412abed1f68d758f6616b (diff) | |
download | op-kernel-dev-4227961650884a06757f80877d5dce0bddc723d4.zip op-kernel-dev-4227961650884a06757f80877d5dce0bddc723d4.tar.gz |
Merge tag 'imx6q-cpudile-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo:
imx6q cpuidle support for 3.9
- It's based on imx-cleanup-3.9 to avoid conflicts.
* tag 'imx6q-cpudile-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx6q: support WAIT mode using cpuidle
ARM: imx: move imx6q_cpuidle_driver into a separate file
ARM: imx: mask gpc interrupts initially
ARM: imx: return zero in case next event gets a large increment
ARM: imx: Remove mx508 support
ARM: imx: Remove mach-mx51_3ds board
ARM: imx: use debug_ll_io_init() for imx6q
ARM: imx: remove unused imx6q_clock_map_io()
ARM: mach-imx: Kconfig: Do not select Babbage for MACH_IMX51_DT
Signed-off-by: Olof Johansson <olof@lixom.net>
Still, two delete/change conflicts caused by imx/cleanup:
arch/arm/mach-imx/mach-mx50_rdp.c
arch/arm/mach-imx/mach-mx51_3ds.c
Diffstat (limited to 'arch/arm/mach-imx/gpc.c')
-rw-r--r-- | arch/arm/mach-imx/gpc.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c index ff24920..a96ccc7 100644 --- a/arch/arm/mach-imx/gpc.c +++ b/arch/arm/mach-imx/gpc.c @@ -101,11 +101,16 @@ static void imx_gpc_irq_mask(struct irq_data *d) void __init imx_gpc_init(void) { struct device_node *np; + int i; np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpc"); gpc_base = of_iomap(np, 0); WARN_ON(!gpc_base); + /* Initially mask all interrupts */ + for (i = 0; i < IMR_NUM; i++) + writel_relaxed(~0, gpc_base + GPC_IMR1 + i * 4); + /* Register GPC as the secondary interrupt controller behind GIC */ gic_arch_extn.irq_mask = imx_gpc_irq_mask; gic_arch_extn.irq_unmask = imx_gpc_irq_unmask; |