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author | Jiri Kosina <jkosina@suse.cz> | 2010-08-04 15:14:38 +0200 |
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committer | Jiri Kosina <jkosina@suse.cz> | 2010-08-04 15:14:38 +0200 |
commit | d790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f (patch) | |
tree | 854ab394486288d40fa8179cbfaf66e8bdc44b0f /arch/arm/mach-imx/devices-imx27.h | |
parent | 73b2c7165b76b20eb1290e7efebc33cfd21db1ca (diff) | |
parent | 3a09b1be53d23df780a0cd0e4087a05e2ca4a00c (diff) | |
download | op-kernel-dev-d790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f.zip op-kernel-dev-d790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f.tar.gz |
Merge branch 'master' into for-next
Diffstat (limited to 'arch/arm/mach-imx/devices-imx27.h')
-rw-r--r-- | arch/arm/mach-imx/devices-imx27.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h new file mode 100644 index 0000000..65e7bb7 --- /dev/null +++ b/arch/arm/mach-imx/devices-imx27.h @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <mach/mx27.h> +#include <mach/devices-common.h> + +#define imx27_add_i2c_imx0(pdata) \ + imx_add_imx_i2c(0, MX27_I2C1_BASE_ADDR, SZ_4K, MX27_INT_I2C1, pdata) +#define imx27_add_i2c_imx1(pdata) \ + imx_add_imx_i2c(1, MX27_I2C2_BASE_ADDR, SZ_4K, MX27_INT_I2C2, pdata) + +#define imx27_add_imx_uart0(pdata) \ + imx_add_imx_uart_1irq(0, MX27_UART1_BASE_ADDR, SZ_4K, MX27_INT_UART1, pdata) +#define imx27_add_imx_uart1(pdata) \ + imx_add_imx_uart_1irq(1, MX27_UART2_BASE_ADDR, SZ_4K, MX27_INT_UART2, pdata) +#define imx27_add_imx_uart2(pdata) \ + imx_add_imx_uart_1irq(2, MX27_UART3_BASE_ADDR, SZ_4K, MX27_INT_UART3, pdata) +#define imx27_add_imx_uart3(pdata) \ + imx_add_imx_uart_1irq(3, MX27_UART4_BASE_ADDR, SZ_4K, MX27_INT_UART4, pdata) +#define imx27_add_imx_uart4(pdata) \ + imx_add_imx_uart_1irq(4, MX27_UART5_BASE_ADDR, SZ_4K, MX27_INT_UART5, pdata) +#define imx27_add_imx_uart5(pdata) \ + imx_add_imx_uart_1irq(5, MX27_UART6_BASE_ADDR, SZ_4K, MX27_INT_UART6, pdata) + +#define imx27_add_mxc_nand(pdata) \ + imx_add_mxc_nand_v1(MX27_NFC_BASE_ADDR, MX27_INT_NANDFC, pdata) + +#define imx27_add_spi_imx0(pdata) \ + imx_add_spi_imx(0, MX27_CSPI1_BASE_ADDR, SZ_4K, MX27_INT_CSPI1, pdata) +#define imx27_add_spi_imx1(pdata) \ + imx_add_spi_imx(1, MX27_CSPI2_BASE_ADDR, SZ_4K, MX27_INT_CSPI2, pdata) +#define imx27_add_spi_imx2(pdata) \ + imx_add_spi_imx(2, MX27_CSPI3_BASE_ADDR, SZ_4K, MX27_INT_CSPI3, pdata) |