diff options
author | Stefan Agner <stefan@agner.ch> | 2014-07-15 14:56:19 +0200 |
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committer | Shawn Guo <shawn.guo@freescale.com> | 2014-07-18 16:11:40 +0800 |
commit | 4349c4298f676815bf7ad146cf37e76843054783 (patch) | |
tree | 3d307e232b2c27b96ae095302df408fbd4e78e1b /arch/arm/mach-imx/clk-vf610.c | |
parent | fd4959d8779a8e7099c6ecf4f7c854dbf34890e9 (diff) | |
download | op-kernel-dev-4349c4298f676815bf7ad146cf37e76843054783.zip op-kernel-dev-4349c4298f676815bf7ad146cf37e76843054783.tar.gz |
ARM: imx: clk-vf610: fix FlexCAN clock gating
Extend the clock control for FlexCAN with the second gate which
enable the clocks in the Clock Divider (CCM_CSCDR2) register too.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/clk-vf610.c')
-rw-r--r-- | arch/arm/mach-imx/clk-vf610.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c index 2435bc4..f60d6d5 100644 --- a/arch/arm/mach-imx/clk-vf610.c +++ b/arch/arm/mach-imx/clk-vf610.c @@ -295,8 +295,10 @@ static void __init vf610_clocks_init(struct device_node *ccm_node) clk[VF610_CLK_ASRC] = imx_clk_gate2("asrc", "ipg_bus", CCM_CCGR4, CCM_CCGRx_CGn(1)); - clk[VF610_CLK_FLEXCAN0] = imx_clk_gate2("flexcan0", "ipg_bus", CCM_CCGR0, CCM_CCGRx_CGn(0)); - clk[VF610_CLK_FLEXCAN1] = imx_clk_gate2("flexcan1", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(4)); + clk[VF610_CLK_FLEXCAN0_EN] = imx_clk_gate("flexcan0_en", "ipg_bus", CCM_CSCDR2, 11); + clk[VF610_CLK_FLEXCAN0] = imx_clk_gate2("flexcan0", "flexcan0_en", CCM_CCGR0, CCM_CCGRx_CGn(0)); + clk[VF610_CLK_FLEXCAN1_EN] = imx_clk_gate("flexcan1_en", "ipg_bus", CCM_CSCDR2, 12); + clk[VF610_CLK_FLEXCAN1] = imx_clk_gate2("flexcan1", "flexcan1_en", CCM_CCGR9, CCM_CCGRx_CGn(4)); clk[VF610_CLK_DMAMUX0] = imx_clk_gate2("dmamux0", "platform_bus", CCM_CCGR0, CCM_CCGRx_CGn(4)); clk[VF610_CLK_DMAMUX1] = imx_clk_gate2("dmamux1", "platform_bus", CCM_CCGR0, CCM_CCGRx_CGn(5)); |