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| author | Philipp Zabel <p.zabel@pengutronix.de> | 2013-03-28 16:23:32 +0100 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-04-12 19:28:13 +0800 |
| commit | 32f3b8da222b0817e0544acd888071aff674b629 (patch) | |
| tree | 4552c837c0b1ad480366c7d2a474dff51ae58b9d /arch/arm/mach-imx/clk-imx6q.c | |
| parent | 2df1d026edc11e88ad0a2216e79232737f5939e2 (diff) | |
| download | op-kernel-dev-32f3b8da222b0817e0544acd888071aff674b629.zip op-kernel-dev-32f3b8da222b0817e0544acd888071aff674b629.tar.gz | |
ARM i.MX6q: set the LDB serial clock parent to the video PLL
On i.MX6q revision 1.1 and later, set the video PLL as parent for
the LDB clock branch. On revision 1.0, the video PLL is useless
due to missing dividers, so keep the default parent (mmdc_ch1_axi).
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx6q.c')
| -rw-r--r-- | arch/arm/mach-imx/clk-imx6q.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 2b230f8..43dbcd6 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -547,6 +547,11 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[cko1], "cko1", NULL); clk_register_clkdev(clk[arm], NULL, "cpu0"); + if (imx6q_revision() != IMX_CHIP_REVISION_1_0) { + clk_set_parent(clk[ldb_di0_sel], clk[pll5_video_div]); + clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]); + } + /* * The gpmi needs 100MHz frequency in the EDO/Sync mode, * We can not get the 100MHz from the pll2_pfd0_352m. |
