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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2005-04-17 15:36:55 +0100
committerRussell King <rmk@dyn-67.arm.linux.org.uk>2005-04-17 15:36:55 +0100
commit336eb02b9171d132a9abe575317fee4cca965af4 (patch)
treebcdd3c61fa4341a20de81dafdfd681d8872f0eb9 /arch/arm/mach-footbridge
parenta757e64cfa400391041ed7953f0290c34a820c93 (diff)
downloadop-kernel-dev-336eb02b9171d132a9abe575317fee4cca965af4.zip
op-kernel-dev-336eb02b9171d132a9abe575317fee4cca965af4.tar.gz
[PATCH] ARM: footbridge rtc init
The footbridge ISA RTC was being initialised before we had setup the kernel timer. This caused a divide by zero error when the current time of day is set. Resolve this by initialising the RTC after the kernel timer has been initialised. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-footbridge')
-rw-r--r--arch/arm/mach-footbridge/dc21285-timer.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index 580e1d4..da5b9b7 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -51,8 +51,6 @@ static struct irqaction footbridge_timer_irq = {
*/
static void __init footbridge_timer_init(void)
{
- isa_rtc_init();
-
timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
*CSR_TIMER1_CLR = 0;
@@ -60,6 +58,8 @@ static void __init footbridge_timer_init(void)
*CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16;
setup_irq(IRQ_TIMER1, &footbridge_timer_irq);
+
+ isa_rtc_init();
}
struct sys_timer footbridge_timer = {
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