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author | Kukjin Kim <kgene.kim@samsung.com> | 2012-11-07 08:11:21 +0900 |
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committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-11-07 08:11:21 +0900 |
commit | 55b85967f4e988d43a11bf0e432f15892e615db0 (patch) | |
tree | 101c2ddb5df41d0b813e3985a8be5c25facc45bf /arch/arm/mach-exynos | |
parent | 3d70f8c617a436c7146ecb81df2265b4626dfe89 (diff) | |
parent | 55b6ef7a7dad269f4438404cc63ba4718c4f8805 (diff) | |
download | op-kernel-dev-55b85967f4e988d43a11bf0e432f15892e615db0.zip op-kernel-dev-55b85967f4e988d43a11bf0e432f15892e615db0.tar.gz |
Merge branch 'next/cleanup-samsung' into next/cleanup-samsung-2
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r-- | arch/arm/mach-exynos/clock-exynos4.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-exynos/common.c | 31 | ||||
-rw-r--r-- | arch/arm/mach-exynos/dev-uart.c | 24 | ||||
-rw-r--r-- | arch/arm/mach-exynos/include/mach/irqs.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-exynos/include/mach/map.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-exynos/mach-nuri.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-exynos/mach-universal_c210.c | 1 |
7 files changed, 6 insertions, 62 deletions
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c index 6a45c9a..fa8a134 100644 --- a/arch/arm/mach-exynos/clock-exynos4.c +++ b/arch/arm/mach-exynos/clock-exynos4.c @@ -613,11 +613,6 @@ static struct clk exynos4_init_clocks_off[] = { .ctrlbit = (1 << 18), }, { .name = "iis", - .devname = "samsung-i2s.0", - .enable = exynos4_clk_ip_peril_ctrl, - .ctrlbit = (1 << 19), - }, { - .name = "iis", .devname = "samsung-i2s.1", .enable = exynos4_clk_ip_peril_ctrl, .ctrlbit = (1 << 20), diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 1947be8..4e577f6 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -63,7 +63,7 @@ static void exynos4_map_io(void); static void exynos5_map_io(void); static void exynos4_init_clocks(int xtal); static void exynos5_init_clocks(int xtal); -static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no); +static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no); static int exynos_init(void); static struct cpu_table cpu_ids[] __initdata = { @@ -72,7 +72,7 @@ static struct cpu_table cpu_ids[] __initdata = { .idmask = EXYNOS4_CPU_MASK, .map_io = exynos4_map_io, .init_clocks = exynos4_init_clocks, - .init_uarts = exynos_init_uarts, + .init_uarts = exynos4_init_uarts, .init = exynos_init, .name = name_exynos4210, }, { @@ -80,7 +80,7 @@ static struct cpu_table cpu_ids[] __initdata = { .idmask = EXYNOS4_CPU_MASK, .map_io = exynos4_map_io, .init_clocks = exynos4_init_clocks, - .init_uarts = exynos_init_uarts, + .init_uarts = exynos4_init_uarts, .init = exynos_init, .name = name_exynos4212, }, { @@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = { .idmask = EXYNOS4_CPU_MASK, .map_io = exynos4_map_io, .init_clocks = exynos4_init_clocks, - .init_uarts = exynos_init_uarts, + .init_uarts = exynos4_init_uarts, .init = exynos_init, .name = name_exynos4412, }, { @@ -96,7 +96,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idmask = EXYNOS5_SOC_MASK, .map_io = exynos5_map_io, .init_clocks = exynos5_init_clocks, - .init_uarts = exynos_init_uarts, .init = exynos_init, .name = name_exynos5250, }, @@ -257,25 +256,10 @@ static struct map_desc exynos5_iodesc[] __initdata = { .length = SZ_64K, .type = MT_DEVICE, }, { - .virtual = (unsigned long)S5P_VA_COMBINER_BASE, - .pfn = __phys_to_pfn(EXYNOS5_PA_COMBINER), - .length = SZ_4K, - .type = MT_DEVICE, - }, { .virtual = (unsigned long)S3C_VA_UART, .pfn = __phys_to_pfn(EXYNOS5_PA_UART), .length = SZ_512K, .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GIC_CPU, - .pfn = __phys_to_pfn(EXYNOS5_PA_GIC_CPU), - .length = SZ_8K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GIC_DIST, - .pfn = __phys_to_pfn(EXYNOS5_PA_GIC_DIST), - .length = SZ_4K, - .type = MT_DEVICE, }, }; @@ -727,7 +711,7 @@ static int __init exynos_init(void) /* uart registration process */ -static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no) +static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no) { struct s3c2410_uartcfg *tcfg = cfg; u32 ucnt; @@ -735,10 +719,7 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no) for (ucnt = 0; ucnt < no; ucnt++, tcfg++) tcfg->has_fracval = 1; - if (soc_is_exynos5250()) - s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no); - else - s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no); + s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no); } static void __iomem *exynos_eint_base; diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c index 2e85c02..7c42f4b 100644 --- a/arch/arm/mach-exynos/dev-uart.c +++ b/arch/arm/mach-exynos/dev-uart.c @@ -52,27 +52,3 @@ struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = { .nr_resources = ARRAY_SIZE(exynos4_uart3_resource), }, }; - -EXYNOS_UART_RESOURCE(5, 0) -EXYNOS_UART_RESOURCE(5, 1) -EXYNOS_UART_RESOURCE(5, 2) -EXYNOS_UART_RESOURCE(5, 3) - -struct s3c24xx_uart_resources exynos5_uart_resources[] __initdata = { - [0] = { - .resources = exynos5_uart0_resource, - .nr_resources = ARRAY_SIZE(exynos5_uart0_resource), - }, - [1] = { - .resources = exynos5_uart1_resource, - .nr_resources = ARRAY_SIZE(exynos5_uart0_resource), - }, - [2] = { - .resources = exynos5_uart2_resource, - .nr_resources = ARRAY_SIZE(exynos5_uart2_resource), - }, - [3] = { - .resources = exynos5_uart3_resource, - .nr_resources = ARRAY_SIZE(exynos5_uart3_resource), - }, -}; diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 35bced6..6da3115 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h @@ -259,11 +259,6 @@ #define EXYNOS5_IRQ_IEM_IEC IRQ_SPI(48) #define EXYNOS5_IRQ_IEM_APC IRQ_SPI(49) #define EXYNOS5_IRQ_GPIO_C2C IRQ_SPI(50) -#define EXYNOS5_IRQ_UART0 IRQ_SPI(51) -#define EXYNOS5_IRQ_UART1 IRQ_SPI(52) -#define EXYNOS5_IRQ_UART2 IRQ_SPI(53) -#define EXYNOS5_IRQ_UART3 IRQ_SPI(54) -#define EXYNOS5_IRQ_UART4 IRQ_SPI(55) #define EXYNOS5_IRQ_IIC IRQ_SPI(56) #define EXYNOS5_IRQ_IIC1 IRQ_SPI(57) #define EXYNOS5_IRQ_IIC2 IRQ_SPI(58) diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 8480849..e737331 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -279,7 +279,6 @@ #define EXYNOS5_PA_UART1 0x12C10000 #define EXYNOS5_PA_UART2 0x12C20000 #define EXYNOS5_PA_UART3 0x12C30000 -#define EXYNOS5_SZ_UART SZ_256 #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index c05d7aa..0b3f88e 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c @@ -113,7 +113,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = { .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | MMC_CAP_ERASE), - .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE, .cd_type = S3C_SDHCI_CD_PERMANENT, }; diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index ebc9dd3..a64c9c2 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c @@ -754,7 +754,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = { .max_width = 8, .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), - .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE, .cd_type = S3C_SDHCI_CD_PERMANENT, }; |