Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (289 commits)
  davinci: DM644x EVM: register MUSB device earlier
  davinci: add spi devices on tnetv107x evm
  davinci: add ssp config for tnetv107x evm board
  davinci: add tnetv107x ssp platform device
  spi: add ti-ssp spi master driver
  mfd: add driver for sequencer serial port
  ARM: EXYNOS4: Implement Clock gating for System MMU
  ARM: EXYNOS4: Enhancement of System MMU driver
  ARM: EXYNOS4: Add support for gpio interrupts
  ARM: S5P: Add function to register gpio interrupt bank data
  ARM: S5P: Cleanup S5P gpio interrupt code
  ARM: EXYNOS4: Add missing GPYx banks
  ARM: S3C64XX: Fix section mismatch from cpufreq init
  ARM: EXYNOS4: Add keypad device to the SMDKV310
  ARM: EXYNOS4: Update clocks for keypad
  ARM: EXYNOS4: Update keypad base address
  ARM: EXYNOS4: Add keypad device helpers
  ARM: EXYNOS4: Add support for SATA on ARMLEX4210
  plat-nomadik: make GPIO interrupts work with cpuidle ApSleep
  mach-u300: define a dummy filter function for coh901318
  ...

Fix up various conflicts in
 - arch/arm/mach-exynos4/cpufreq.c
 - arch/arm/mach-mxs/gpio.c
 - drivers/net/Kconfig
 - drivers/tty/serial/Kconfig
 - drivers/tty/serial/Makefile
 - drivers/usb/gadget/fsl_mxc_udc.c
 - drivers/video/Kconfig

1 files changed, 84 insertions, 0 deletions

diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S
new file mode 100644
index 0000000..d8f38c2
--- /dev/null
+++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
@@ -0,0 +1,84 @@
+/* arch/arm/mach-exynos4/include/mach/entry-macro.S
+ *
+ * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S
+ *
+ * Low-level IRQ helper macros for EXYNOS4 platforms
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+*/
+
+#include <mach/hardware.h>
+#include <asm/hardware/gic.h>
+
+		.macro	disable_fiq
+		.endm
+
+		.macro  get_irqnr_preamble, base, tmp
+		ldr	\base, =gic_cpu_base_addr
+		ldr	\base, [\base]
+		.endm
+
+		.macro  arch_ret_to_user, tmp1, tmp2
+		.endm
+
+		/*
+		 * The interrupt numbering scheme is defined in the
+		 * interrupt controller spec.  To wit:
+		 *
+		 * Interrupts 0-15 are IPI
+		 * 16-28 are reserved
+		 * 29-31 are local.  We allow 30 to be used for the watchdog.
+		 * 32-1020 are global
+		 * 1021-1022 are reserved
+		 * 1023 is "spurious" (no interrupt)
+		 *
+		 * For now, we ignore all local interrupts so only return an interrupt if it's
+		 * between 30 and 1020.  The test_for_ipi routine below will pick up on IPIs.
+		 *
+		 * A simple read from the controller will tell us the number of the highest
+                 * priority enabled interrupt.  We then just need to check whether it is in the
+		 * valid range for an IRQ (30-1020 inclusive).
+		 */
+
+		.macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+		ldr     \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
+
+		ldr	\tmp, =1021
+
+		bic     \irqnr, \irqstat, #0x1c00
+
+		cmp     \irqnr, #29
+		cmpcc	\irqnr, \irqnr
+		cmpne	\irqnr, \tmp
+		cmpcs	\irqnr, \irqnr
+		addne	\irqnr, \irqnr, #32
+
+		.endm
+
+		/* We assume that irqstat (the raw value of the IRQ acknowledge
+		 * register) is preserved from the macro above.
+		 * If there is an IPI, we immediately signal end of interrupt on the
+		 * controller, since this requires the original irqstat value which
+		 * we won't easily be able to recreate later.
+		 */
+
+		.macro test_for_ipi, irqnr, irqstat, base, tmp
+		bic	\irqnr, \irqstat, #0x1c00
+		cmp	\irqnr, #16
+		strcc	\irqstat, [\base, #GIC_CPU_EOI]
+		cmpcs	\irqnr, \irqnr
+		.endm
+
+		/* As above, this assumes that irqstat and base are preserved.. */
+
+		.macro test_for_ltirq, irqnr, irqstat, base, tmp
+		bic	\irqnr, \irqstat, #0x1c00
+		mov	\tmp, #0
+		cmp	\irqnr, #29
+		moveq	\tmp, #1
+		streq	\irqstat, [\base, #GIC_CPU_EOI]
+		cmp	\tmp, #0
+		.endm