ARM: EXYNOS: Add ARCH_EXYNOS and reorganize arch/arm/mach-exynos

The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has
made for plaforms based on EXYNOS4 SoCs. But since upcoming
Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most
codes in current mach-exynos4, one mach-exynos directory will
be used for them.

This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos)
but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to
avoid changing in driver side.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

1 files changed, 42 insertions, 0 deletions

diff --git a/arch/arm/mach-exynos/init.c b/arch/arm/mach-exynos/init.c
new file mode 100644
index 0000000..a8a83e3
--- /dev/null
+++ b/arch/arm/mach-exynos/init.c
@@ -0,0 +1,42 @@
+/* linux/arch/arm/mach-exynos4/init.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/serial_core.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/regs-serial.h>
+
+static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
+	[0] = {
+		.name		= "uclk1",
+		.divisor	= 1,
+		.min_baud	= 0,
+		.max_baud	= 0,
+	},
+};
+
+/* uart registration process */
+void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+	struct s3c2410_uartcfg *tcfg = cfg;
+	u32 ucnt;
+
+	for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+		if (!tcfg->clocks) {
+			tcfg->has_fracval = 1;
+			tcfg->clocks = exynos4_serial_clocks;
+			tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
+		}
+		tcfg->flags |= NO_NEED_CHECK_CLKSRC;
+	}
+
+	s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
+}