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| author | Olof Johansson <olof@lixom.net> | 2016-07-05 22:41:01 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2016-07-05 22:41:01 -0700 |
| commit | 553228d073444ac49cb24cafdde3e8a3fc56297a (patch) | |
| tree | f11727a3ee3087d3ab7f3d679de3c9fafd76979b /arch/arm/mach-exynos/headsmp.S | |
| parent | df92d2e39313d0af510cacef27e82be6a002b889 (diff) | |
| parent | 1c03274d68f4744afe582fcff1c2e5b1c5c34b5b (diff) | |
| download | op-kernel-dev-553228d073444ac49cb24cafdde3e8a3fc56297a.zip op-kernel-dev-553228d073444ac49cb24cafdde3e8a3fc56297a.tar.gz | |
Merge tag 'samsung-soc-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Samsung mach/soc update for v4.8, part 2:
1. Endian-friendly fixes.
2. Maintainers update.
* tag 'samsung-soc-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
MAINTAINERS: Extend Samsung SoC entry with S3C/S5P drivers
ARM: SAMSUNG: Fix missing s5p_init_cpu() declaration
ARM: EXYNOS: Fix UART address selection for DEBUG_LL
ARM: EXYNOS: Fixup for __raw operations in suspend.c
ARM: SAMSUNG: Fixup usage of __raw IO in PM
ARM: EXYNOS: Fixup endian in pm/pmu
ARM: EXYNOS: Fixups for big-endian operation
ARM: SAMSUNG: Fixup endian issues in CPU detection
ARM: EXYNOS: Fixup debug macros for big-endian
ARM: s3c24xx: Sort cpufreq tables
ARM: SAMSUNG: Fix typos
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-exynos/headsmp.S')
| -rw-r--r-- | arch/arm/mach-exynos/headsmp.S | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S index b54f970..d3d24ab 100644 --- a/arch/arm/mach-exynos/headsmp.S +++ b/arch/arm/mach-exynos/headsmp.S @@ -12,12 +12,15 @@ #include <linux/linkage.h> #include <linux/init.h> +#include <asm/assembler.h> + /* * exynos4 specific entry point for secondary CPUs. This provides * a "holding pen" into which all secondary cores are held until we're * ready for them to initialise. */ ENTRY(exynos4_secondary_startup) +ARM_BE8(setend be) mrc p15, 0, r0, c0, c0, 5 and r0, r0, #15 adr r4, 1f |
