summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-exynos/clock-exynos5.c
diff options
context:
space:
mode:
authorAbhilash Kesavan <a.kesavan@samsung.com>2012-11-20 20:34:58 +0900
committerKukjin Kim <kgene.kim@samsung.com>2012-11-20 20:34:58 +0900
commit0f9e03591f9bbcf205a7fff5b5ae9e445b5c3dc3 (patch)
tree546ee9c0a3936e4b1cfd066789da7382b4aa32a1 /arch/arm/mach-exynos/clock-exynos5.c
parent86ffb0e83a55aef81e96a9cede28af576c9d5541 (diff)
downloadop-kernel-dev-0f9e03591f9bbcf205a7fff5b5ae9e445b5c3dc3.zip
op-kernel-dev-0f9e03591f9bbcf205a7fff5b5ae9e445b5c3dc3.tar.gz
ARM: EXYNOS: Add ARM down clock support
In idle state down clocking the arm cores can result in power savings. Program the power control registers to achieve this and save these registers across a suspend/resume cycle. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/clock-exynos5.c')
-rw-r--r--arch/arm/mach-exynos/clock-exynos5.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index de9ae13..31f4509b 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -80,6 +80,8 @@ static struct sleep_save exynos5_clock_save[] = {
SAVE_ITEM(EXYNOS5_VPLL_CON0),
SAVE_ITEM(EXYNOS5_VPLL_CON1),
SAVE_ITEM(EXYNOS5_VPLL_CON2),
+ SAVE_ITEM(EXYNOS5_PWR_CTRL1),
+ SAVE_ITEM(EXYNOS5_PWR_CTRL2),
};
#endif
OpenPOWER on IntegriCloud