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| author | Hartley Sweeten <hartleys@visionengravers.com> | 2008-10-28 17:55:30 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-12-01 17:22:09 +0000 |
| commit | 799a0600ac49b03c1a6244847c2725c0082ba775 (patch) | |
| tree | 971e5b3529b09228b095feedc9eeb9e0734fa568 /arch/arm/mach-ep93xx | |
| parent | d52a26a956d3925c6eaf8770e95e4d5f13740696 (diff) | |
| download | op-kernel-dev-799a0600ac49b03c1a6244847c2725c0082ba775.zip op-kernel-dev-799a0600ac49b03c1a6244847c2725c0082ba775.tar.gz | |
[ARM] 5324/2: ep93xx: support gpio interrupt debounce
Add debounce support for ep93xx gpio interrupts.
On the EP93xx, GPIO ports A, B, and F can be used to generate
interrupts. For each port, if interrupts are enabled, it is
possible to debouce the input signal. Debouncing is implemented
by passing the input signal through a 2-bit shift register clocked
by a 128Hz clock.
This patch adds a platform specific way to enable the debouce
feature for these input ports.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ep93xx')
| -rw-r--r-- | arch/arm/mach-ep93xx/core.c | 18 | ||||
| -rw-r--r-- | arch/arm/mach-ep93xx/include/mach/gpio.h | 2 |
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 61da67f..4781f32 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -155,12 +155,14 @@ static unsigned char gpio_int_unmasked[3]; static unsigned char gpio_int_enabled[3]; static unsigned char gpio_int_type1[3]; static unsigned char gpio_int_type2[3]; +static unsigned char gpio_int_debouce[3]; /* Port ordering is: A B F */ static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c }; static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 }; static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 }; static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x58 }; +static const u8 int_debounce_register_offset[3] = { 0xa8, 0xc4, 0x64 }; void ep93xx_gpio_update_int_params(unsigned port) { @@ -183,6 +185,22 @@ void ep93xx_gpio_int_mask(unsigned line) gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7)); } +void ep93xx_gpio_int_debounce(unsigned int irq, int enable) +{ + int line = irq_to_gpio(irq); + int port = line >> 3; + int port_mask = 1 << (line & 7); + + if (enable) + gpio_int_debouce[port] |= port_mask; + else + gpio_int_debouce[port] &= ~port_mask; + + __raw_writeb(gpio_int_debouce[port], + EP93XX_GPIO_REG(int_debounce_register_offset[port])); +} +EXPORT_SYMBOL(ep93xx_gpio_int_debounce); + /************************************************************************* * EP93xx IRQ handling *************************************************************************/ diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio.h index f702041..0a1498a 100644 --- a/arch/arm/mach-ep93xx/include/mach/gpio.h +++ b/arch/arm/mach-ep93xx/include/mach/gpio.h @@ -99,6 +99,8 @@ /* maximum value for irq capable line identifiers */ #define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7) +extern void ep93xx_gpio_int_debounce(unsigned int irq, int enable); + /* new generic GPIO API - see Documentation/gpio.txt */ #include <asm-generic/gpio.h> |
