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authorIdo Yariv <ido@wizery.com>2011-07-10 16:14:35 +0300
committerSekhar Nori <nsekhar@ti.com>2011-09-17 15:54:08 +0530
commitf23fe857bbea393b4b94fe2218c98d934bd3d4cf (patch)
tree39661f5a8db2b71a3efcd4dd19c5133462de87f4 /arch/arm/mach-davinci/dm644x.c
parentb6fd41e29dea9c6753b1843a77e50433e6123bcb (diff)
downloadop-kernel-dev-f23fe857bbea393b4b94fe2218c98d934bd3d4cf.zip
op-kernel-dev-f23fe857bbea393b4b94fe2218c98d934bd3d4cf.tar.gz
ARM: davinci: Explicitly set channel controllers' default queues
Davinci platforms may define a default queue for each channel controller. If one is not defined, the default queue is set to EVENTQ_1. However, there's no way to distinguish between an unset default queue to one that is set to EVENTQ_0, as EVENTQ_0 = 0. Explicitly specify the default queue for all channel controllers on all Davinci platforms to EVENTQ_1, and don't overwrite it in the EDMA probe function. One exception is the DA850 board, for which EVENTQ_1 is not a valid option for its second channel controller. Use EVENTQ_0 instead for that channel controller. Signed-off-by: Ido Yariv <ido@wizery.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/dm644x.c')
-rw-r--r--arch/arm/mach-davinci/dm644x.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 4c82c27..555ff5b 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -514,6 +514,7 @@ static struct edma_soc_info edma_cc0_info = {
.n_cc = 1,
.queue_tc_mapping = queue_tc_mapping,
.queue_priority_mapping = queue_priority_mapping,
+ .default_queue = EVENTQ_1,
};
static struct edma_soc_info *dm644x_edma_info[EDMA_MAX_CC] = {
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