diff options
| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2012-01-26 14:07:09 +0100 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2012-02-03 13:33:05 +0100 |
| commit | 9918ceafd4a9e013572e03983f528017c29bb1cb (patch) | |
| tree | 90d7885b26b87d27ed4cdb4026e608908e8a8a4c /arch/arm/mach-at91/pm_slowclock.S | |
| parent | 57225b76864210d667b935c54babf22b6c31336b (diff) | |
| download | op-kernel-dev-9918ceafd4a9e013572e03983f528017c29bb1cb.zip op-kernel-dev-9918ceafd4a9e013572e03983f528017c29bb1cb.tar.gz | |
ARM: at91: code removal of CAP9 SoC
Following removal announce and addition to feature-removal-schedule.txt,
here is the actual source code deletion for Atmel CAP9 family.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/pm_slowclock.S')
| -rw-r--r-- | arch/arm/mach-at91/pm_slowclock.S | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S index 92dfb84..f8539a8b 100644 --- a/arch/arm/mach-at91/pm_slowclock.S +++ b/arch/arm/mach-at91/pm_slowclock.S @@ -18,8 +18,7 @@ #if defined(CONFIG_ARCH_AT91RM9200) #include <mach/at91rm9200_mc.h> -#elif defined(CONFIG_ARCH_AT91CAP9) \ - || defined(CONFIG_ARCH_AT91SAM9G45) +#elif defined(CONFIG_ARCH_AT91SAM9G45) #include <mach/at91sam9_ddrsdr.h> #else #include <mach/at91sam9_sdramc.h> @@ -130,8 +129,7 @@ ENTRY(at91_slow_clock) /* Put SDRAM in self-refresh mode */ mov r3, #1 str r3, [r2, #AT91_SDRAMC_SRR] -#elif defined(CONFIG_ARCH_AT91CAP9) \ - || defined(CONFIG_ARCH_AT91SAM9G45) +#elif defined(CONFIG_ARCH_AT91SAM9G45) /* prepare for DDRAM self-refresh mode */ ldr r3, [r2, #AT91_DDRSDRC_LPR] @@ -263,8 +261,7 @@ ENTRY(at91_slow_clock) #ifdef CONFIG_ARCH_AT91RM9200 /* Do nothing - self-refresh is automatically disabled. */ -#elif defined(CONFIG_ARCH_AT91CAP9) \ - || defined(CONFIG_ARCH_AT91SAM9G45) +#elif defined(CONFIG_ARCH_AT91SAM9G45) /* Restore LPR on AT91 with DDRAM */ ldr r3, .saved_sam9_lpr str r3, [r2, #AT91_DDRSDRC_LPR] @@ -305,8 +302,7 @@ ENTRY(at91_slow_clock) #ifdef CONFIG_ARCH_AT91RM9200 .at91_va_base_sdramc: .word AT91_VA_BASE_SYS -#elif defined(CONFIG_ARCH_AT91CAP9) \ - || defined(CONFIG_ARCH_AT91SAM9G45) +#elif defined(CONFIG_ARCH_AT91SAM9G45) .at91_va_base_sdramc: .word AT91_VA_BASE_SYS + AT91_DDRSDRC0 #else |
