diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-11-25 09:59:46 +0800 |
---|---|---|
committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2012-02-23 14:57:57 +0100 |
commit | b55149529d265718a989b67468c4f03de0d3af7a (patch) | |
tree | cccba7e40bbca7b0ded59152162bb64b343dc337 /arch/arm/mach-at91/pm_slowclock.S | |
parent | 940192e3c651eb6b97b42cb4c28e9e8471675cd2 (diff) | |
download | op-kernel-dev-b55149529d265718a989b67468c4f03de0d3af7a.zip op-kernel-dev-b55149529d265718a989b67468c4f03de0d3af7a.tar.gz |
ARM: at91/PMC: make register base soc independent
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Ryan Mallon <rmallon@gmail.com>
Diffstat (limited to 'arch/arm/mach-at91/pm_slowclock.S')
-rw-r--r-- | arch/arm/mach-at91/pm_slowclock.S | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S index 2c46010..db54521 100644 --- a/arch/arm/mach-at91/pm_slowclock.S +++ b/arch/arm/mach-at91/pm_slowclock.S @@ -54,7 +54,7 @@ tmp2 .req r5 1: sub tmp2, tmp2, #1 cmp tmp2, #0 beq 2f - ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)] + ldr tmp1, [pmc, #AT91_PMC_SR] tst tmp1, #AT91_PMC_MCKRDY beq 1b 2: @@ -68,7 +68,7 @@ tmp2 .req r5 1: sub tmp2, tmp2, #1 cmp tmp2, #0 beq 2f - ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)] + ldr tmp1, [pmc, #AT91_PMC_SR] tst tmp1, #AT91_PMC_MOSCS beq 1b 2: @@ -82,7 +82,7 @@ tmp2 .req r5 1: sub tmp2, tmp2, #1 cmp tmp2, #0 beq 2f - ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)] + ldr tmp1, [pmc, #AT91_PMC_SR] tst tmp1, #AT91_PMC_LOCKA beq 1b 2: @@ -96,7 +96,7 @@ tmp2 .req r5 1: sub tmp2, tmp2, #1 cmp tmp2, #0 beq 2f - ldr tmp1, [pmc, #(AT91_PMC_SR - AT91_PMC)] + ldr tmp1, [pmc, #AT91_PMC_SR] tst tmp1, #AT91_PMC_LOCKB beq 1b 2: @@ -176,14 +176,14 @@ sdr_sr_enable: sdr_sr_done: /* Save Master clock setting */ - ldr tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)] + ldr tmp1, [pmc, #AT91_PMC_MCKR] str tmp1, .saved_mckr /* * Set the Master clock source to slow clock */ bic tmp1, tmp1, #AT91_PMC_CSS - str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)] + str tmp1, [pmc, #AT91_PMC_MCKR] wait_mckrdy @@ -194,44 +194,44 @@ sdr_sr_done: * See AT91RM9200 errata #27 and #28 for details. */ mov tmp1, #0 - str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)] + str tmp1, [pmc, #AT91_PMC_MCKR] wait_mckrdy #endif /* Save PLLA setting and disable it */ - ldr tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)] + ldr tmp1, [pmc, #AT91_CKGR_PLLAR] str tmp1, .saved_pllar mov tmp1, #AT91_PMC_PLLCOUNT orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */ - str tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)] + str tmp1, [pmc, #AT91_CKGR_PLLAR] /* Save PLLB setting and disable it */ - ldr tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)] + ldr tmp1, [pmc, #AT91_CKGR_PLLBR] str tmp1, .saved_pllbr mov tmp1, #AT91_PMC_PLLCOUNT - str tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)] + str tmp1, [pmc, #AT91_CKGR_PLLBR] /* Turn off the main oscillator */ - ldr tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)] + ldr tmp1, [pmc, #AT91_CKGR_MOR] bic tmp1, tmp1, #AT91_PMC_MOSCEN - str tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)] + str tmp1, [pmc, #AT91_CKGR_MOR] /* Wait for interrupt */ mcr p15, 0, tmp1, c7, c0, 4 /* Turn on the main oscillator */ - ldr tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)] + ldr tmp1, [pmc, #AT91_CKGR_MOR] orr tmp1, tmp1, #AT91_PMC_MOSCEN - str tmp1, [pmc, #(AT91_CKGR_MOR - AT91_PMC)] + str tmp1, [pmc, #AT91_CKGR_MOR] wait_moscrdy /* Restore PLLB setting */ ldr tmp1, .saved_pllbr - str tmp1, [pmc, #(AT91_CKGR_PLLBR - AT91_PMC)] + str tmp1, [pmc, #AT91_CKGR_PLLBR] tst tmp1, #(AT91_PMC_MUL & 0xff0000) bne 1f @@ -243,7 +243,7 @@ sdr_sr_done: /* Restore PLLA setting */ ldr tmp1, .saved_pllar - str tmp1, [pmc, #(AT91_CKGR_PLLAR - AT91_PMC)] + str tmp1, [pmc, #AT91_CKGR_PLLAR] tst tmp1, #(AT91_PMC_MUL & 0xff0000) bne 3f @@ -264,7 +264,7 @@ sdr_sr_done: tst tmp1, #AT91_PMC_PRES beq 2f and tmp1, tmp1, #AT91_PMC_PRES - str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)] + str tmp1, [pmc, #AT91_PMC_MCKR] wait_mckrdy #endif @@ -273,7 +273,7 @@ sdr_sr_done: * Restore master clock setting */ 2: ldr tmp1, .saved_mckr - str tmp1, [pmc, #(AT91_PMC_MCKR - AT91_PMC)] + str tmp1, [pmc, #AT91_PMC_MCKR] wait_mckrdy |