[ARM] 5289/1: [AT91] Convert boards to use sam9_smc_configure()

Convert the SAM9 and CAP9 board-specific files to make use of the
sam9_smc_configure() method to configure the memory-controller for
external peripherals.

The following boards have been modified:
 cam60 : NAND
 cap9adk : NAND, NOR
 qil-a9260 : NAND
 sam9-l9260 : NAND
 sam9260ek : NAND
 sam9261ek : DM9000 Ethernet, NAND
 sam9263 : NAND
 sam9g20ek : NAND
 sam9rlek : NAND
 usb-a9260 : NAND
 usb-a9263 .: NAND

Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 59 insertions, 13 deletions

diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 201b893..43b37bc 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -47,6 +47,7 @@
 #include <mach/at91cap9_matrix.h>
 #include <mach/at91sam9_smc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -195,6 +196,43 @@ static struct atmel_nand_data __initdata cap9adk_nand_data = {
 #endif
 };
 
+static struct sam9_smc_config __initdata cap9adk_nand_smc_config = {
+	.ncs_read_setup		= 1,
+	.nrd_setup		= 2,
+	.ncs_write_setup	= 1,
+	.nwe_setup		= 2,
+
+	.ncs_read_pulse		= 6,
+	.nrd_pulse		= 4,
+	.ncs_write_pulse	= 6,
+	.nwe_pulse		= 4,
+
+	.read_cycle		= 8,
+	.write_cycle		= 8,
+
+	.mode			= AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+	.tdf_cycles		= 1,
+};
+
+static void __init cap9adk_add_device_nand(void)
+{
+	unsigned long csa;
+
+	csa = at91_sys_read(AT91_MATRIX_EBICSA);
+	at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
+
+	/* setup bus-width (8 or 16) */
+	if (cap9adk_nand_data.bus_width_16)
+		cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
+	else
+		cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+	/* configure chip-select 3 (NAND) */
+	sam9_smc_configure(3, &cap9adk_nand_smc_config);
+
+	at91_add_device_nand(&cap9adk_nand_data);
+}
+
 
 /*
  * NOR flash
@@ -234,6 +272,24 @@ static struct platform_device cap9adk_nor_flash = {
 	.num_resources	= ARRAY_SIZE(nor_flash_resources),
 };
 
+static struct sam9_smc_config __initdata cap9adk_nor_smc_config = {
+	.ncs_read_setup		= 2,
+	.nrd_setup		= 4,
+	.ncs_write_setup	= 2,
+	.nwe_setup		= 4,
+
+	.ncs_read_pulse		= 10,
+	.nrd_pulse		= 8,
+	.ncs_write_pulse	= 10,
+	.nwe_pulse		= 8,
+
+	.read_cycle		= 16,
+	.write_cycle		= 16,
+
+	.mode			= AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
+	.tdf_cycles		= 1,
+};
+
 static __init void cap9adk_add_device_nor(void)
 {
 	unsigned long csa;
@@ -241,18 +297,8 @@ static __init void cap9adk_add_device_nor(void)
 	csa = at91_sys_read(AT91_MATRIX_EBICSA);
 	at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
 
-	/* set the bus interface characteristics */
-	at91_sys_write(AT91_SMC_SETUP(0), AT91_SMC_NWESETUP_(4) | AT91_SMC_NCS_WRSETUP_(2)
-			| AT91_SMC_NRDSETUP_(4) | AT91_SMC_NCS_RDSETUP_(2));
-
-	at91_sys_write(AT91_SMC_PULSE(0), AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(10)
-			| AT91_SMC_NRDPULSE_(8) | AT91_SMC_NCS_RDPULSE_(10));
-
-	at91_sys_write(AT91_SMC_CYCLE(0), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
-
-	at91_sys_write(AT91_SMC_MODE(0), AT91_SMC_READMODE | AT91_SMC_WRITEMODE
-			| AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
-			| AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
+	/* configure chip-select 0 (NOR) */
+	sam9_smc_configure(0, &cap9adk_nor_smc_config);
 
 	platform_device_register(&cap9adk_nor_flash);
 }
@@ -344,7 +390,7 @@ static void __init cap9adk_board_init(void)
 	/* Ethernet */
 	at91_add_device_eth(&cap9adk_macb_data);
 	/* NAND */
-	at91_add_device_nand(&cap9adk_nand_data);
+	cap9adk_add_device_nand();
 	/* NOR Flash */
 	cap9adk_add_device_nor();
 	/* I2C */