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author | Johan Hovold <jhovold@gmail.com> | 2013-02-07 16:31:58 +0100 |
---|---|---|
committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2013-03-13 11:05:12 +0100 |
commit | bbd44f6bd9d1aa735b180b29b5719d63a8e87b55 (patch) | |
tree | d2d6b87a1104b5a931ea95a7f0c7c9341ad6f079 /arch/arm/mach-at91/at91sam9263.c | |
parent | 934a50bd089789d1ed74f0bef4988a97bd590afe (diff) | |
download | op-kernel-dev-bbd44f6bd9d1aa735b180b29b5719d63a8e87b55.zip op-kernel-dev-bbd44f6bd9d1aa735b180b29b5719d63a8e87b55.tar.gz |
ARM: at91/avr32/atmel_lcdfb: add platform device-id table
Add platform device-id table in order to identify the controller and
determine its configuration.
The currently used configuration parameters are:
have_alt_pixclock
- SOC uses an alternate pixel-clock calculation formula (at91sam9g45
non-ES)
have_hozval
- SOC has a HOZVAL field in LCDFRMCFG which is used to determine the
linesize for STN displays (at91sam9261, at921sam9g10 and at32ap)
have_intensity_bit
- SOC uses IBGR:555 rather than BGR:565 16-bit pixel layout
(at91sam9261, at91sam9263 and at91sam9rl)
This allows us to remove all the remaining uses of cpu_is macros from
the driver.
Tested on at91sam9263 and at91sam9g45, compile-tested for other
AT91-SOCs, and untested for AVR32.
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9263.c')
-rw-r--r-- | arch/arm/mach-at91/at91sam9263.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 520a63d..2282fd7 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -190,7 +190,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk), CLKDEV_CON_DEV_ID("pclk", "fff98000.ssc", &ssc0_clk), CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc1_clk), - CLKDEV_CON_DEV_ID("hclk", "atmel_lcdfb.0", &lcdc_clk), + CLKDEV_CON_DEV_ID("hclk", "at91sam9263-lcdfb.0", &lcdc_clk), CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk), CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk), CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), |