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author | Bandan Das <bsd@redhat.com> | 2016-07-12 18:18:51 -0400 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2016-07-14 09:03:50 +0200 |
commit | d95c55687e11febe3ab1aacfe82b58b1822c52c4 (patch) | |
tree | ef950c000f877fbbc19181bfcfa2f590cecc37ba /arch/arm/mach-aspeed | |
parent | ffb128c89b77b44da18ccf51844a8e750e2c427a (diff) | |
download | op-kernel-dev-d95c55687e11febe3ab1aacfe82b58b1822c52c4.zip op-kernel-dev-d95c55687e11febe3ab1aacfe82b58b1822c52c4.tar.gz |
kvm: mmu: track read permission explicitly for shadow EPT page tables
To support execute only mappings on behalf of L1 hypervisors,
reuse ACC_USER_MASK to signify if the L1 hypervisor has the R bit
set.
For the nested EPT case, we assumed that the U bit was always set
since there was no equivalent in EPT page tables. Strictly
speaking, this was not necessary because handle_ept_violation
never set PFERR_USER_MASK in the error code (uf=0 in the
parlance of update_permission_bitmask). We now have to set
both U and UF correctly, respectively in FNAME(gpte_access)
and in handle_ept_violation.
Also in handle_ept_violation bit 3 of the exit qualification is
not enough to detect a present PTE; all three bits 3-5 have to
be checked.
Signed-off-by: Bandan Das <bsd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/arm/mach-aspeed')
0 files changed, 0 insertions, 0 deletions