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| author | Ingo Molnar <mingo@elte.hu> | 2008-07-16 00:29:07 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-07-16 00:29:07 +0200 |
| commit | 82638844d9a8581bbf33201cc209a14876eca167 (patch) | |
| tree | 961d7f9360194421a71aa644a9d0c176a960ce49 /arch/arm/lib/copy_template.S | |
| parent | 9982fbface82893e77d211fbabfbd229da6bdde6 (diff) | |
| parent | 63cf13b77ab785e87c867defa8545e6d4a989774 (diff) | |
| download | op-kernel-dev-82638844d9a8581bbf33201cc209a14876eca167.zip op-kernel-dev-82638844d9a8581bbf33201cc209a14876eca167.tar.gz | |
Merge branch 'linus' into cpus4096
Conflicts:
arch/x86/xen/smp.c
kernel/sched_rt.c
net/iucv/iucv.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/lib/copy_template.S')
| -rw-r--r-- | arch/arm/lib/copy_template.S | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/arch/arm/lib/copy_template.S b/arch/arm/lib/copy_template.S index cab355c..139cce6 100644 --- a/arch/arm/lib/copy_template.S +++ b/arch/arm/lib/copy_template.S @@ -13,14 +13,6 @@ */ /* - * This can be used to enable code to cacheline align the source pointer. - * Experiments on tested architectures (StrongARM and XScale) didn't show - * this a worthwhile thing to do. That might be different in the future. - */ -//#define CALGN(code...) code -#define CALGN(code...) - -/* * Theory of operation * ------------------- * @@ -82,7 +74,7 @@ stmfd sp!, {r5 - r8} blt 5f - CALGN( ands ip, r1, #31 ) + CALGN( ands ip, r0, #31 ) CALGN( rsb r3, ip, #32 ) CALGN( sbcnes r4, r3, r2 ) @ C is always set here CALGN( bcs 2f ) @@ -168,7 +160,7 @@ subs r2, r2, #28 blt 14f - CALGN( ands ip, r1, #31 ) + CALGN( ands ip, r0, #31 ) CALGN( rsb ip, ip, #32 ) CALGN( sbcnes r4, ip, r2 ) @ C is always set here CALGN( subcc r2, r2, ip ) |
