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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-04-04 00:33:49 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-04-04 00:33:49 +0100 |
| commit | bce5669be3a8946952258a064ef26defeb887138 (patch) | |
| tree | 117386b9909882c000f822011c5ea6fdcbab3273 /arch/arm/kernel/process.c | |
| parent | 95959e6a06720834fc80a210e37898341c63cb91 (diff) | |
| parent | 566b60c04ab230b8cc3845f964306f99504b18df (diff) | |
| download | op-kernel-dev-bce5669be3a8946952258a064ef26defeb887138.zip op-kernel-dev-bce5669be3a8946952258a064ef26defeb887138.tar.gz | |
Merge branch 'devel-stable' into for-next
Diffstat (limited to 'arch/arm/kernel/process.c')
| -rw-r--r-- | arch/arm/kernel/process.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 92f7b15..204f7d2 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -48,14 +48,14 @@ unsigned long __stack_chk_guard __read_mostly; EXPORT_SYMBOL(__stack_chk_guard); #endif -static const char *processor_modes[] = { +static const char *processor_modes[] __maybe_unused = { "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" , "UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26", "USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "UK6_32" , "ABT_32" , "UK8_32" , "UK9_32" , "UK10_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32" }; -static const char *isa_modes[] = { +static const char *isa_modes[] __maybe_unused = { "ARM" , "Thumb" , "Jazelle", "ThumbEE" }; @@ -276,12 +276,17 @@ void __show_regs(struct pt_regs *regs) buf[3] = flags & PSR_V_BIT ? 'V' : 'v'; buf[4] = '\0'; +#ifndef CONFIG_CPU_V7M printk("Flags: %s IRQs o%s FIQs o%s Mode %s ISA %s Segment %s\n", buf, interrupts_enabled(regs) ? "n" : "ff", fast_interrupts_enabled(regs) ? "n" : "ff", processor_modes[processor_mode(regs)], isa_modes[isa_mode(regs)], get_fs() == get_ds() ? "kernel" : "user"); +#else + printk("xPSR: %08lx\n", regs->ARM_cpsr); +#endif + #ifdef CONFIG_CPU_CP15 { unsigned int ctrl; |
