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author | Ben Dooks <ben.dooks@codethink.co.uk> | 2013-11-08 18:29:25 +0000 |
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committer | Taras Kondratiuk <taras@ti.com> | 2014-04-01 16:45:19 +0300 |
commit | 888be25402021a425da3e85e2d5a954d7509286e (patch) | |
tree | 5f6a556112fe3098370272c57e482501956d8f6c /arch/arm/kernel/probes.c | |
parent | c7edc9e326d53ca5ef9bed82de0740c6b107d55b (diff) | |
download | op-kernel-dev-888be25402021a425da3e85e2d5a954d7509286e.zip op-kernel-dev-888be25402021a425da3e85e2d5a954d7509286e.tar.gz |
ARM: probes: fix instruction fetch order with <asm/opcodes.h>
If we are running BE8, the data and instruction endianness do not
match, so use <asm/opcodes.h> to correctly translate memory accesses
into ARM instructions.
Acked-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[taras.kondratiuk@linaro.org: fixed Thumb instruction fetch order]
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Diffstat (limited to 'arch/arm/kernel/probes.c')
-rw-r--r-- | arch/arm/kernel/probes.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/arch/arm/kernel/probes.c b/arch/arm/kernel/probes.c index b41873f..a8ab540 100644 --- a/arch/arm/kernel/probes.c +++ b/arch/arm/kernel/probes.c @@ -202,13 +202,14 @@ prepare_emulated_insn(probes_opcode_t insn, struct arch_probes_insn *asi, #ifdef CONFIG_THUMB2_KERNEL if (thumb) { u16 *thumb_insn = (u16 *)asi->insn; - thumb_insn[1] = 0x4770; /* Thumb bx lr */ - thumb_insn[2] = 0x4770; /* Thumb bx lr */ + /* Thumb bx lr */ + thumb_insn[1] = __opcode_to_mem_thumb16(0x4770); + thumb_insn[2] = __opcode_to_mem_thumb16(0x4770); return insn; } - asi->insn[1] = 0xe12fff1e; /* ARM bx lr */ + asi->insn[1] = __opcode_to_mem_arm(0xe12fff1e); /* ARM bx lr */ #else - asi->insn[1] = 0xe1a0f00e; /* mov pc, lr */ + asi->insn[1] = __opcode_to_mem_arm(0xe1a0f00e); /* mov pc, lr */ #endif /* Make an ARM instruction unconditional */ if (insn < 0xe0000000) @@ -228,12 +229,12 @@ set_emulated_insn(probes_opcode_t insn, struct arch_probes_insn *asi, if (thumb) { u16 *ip = (u16 *)asi->insn; if (is_wide_instruction(insn)) - *ip++ = insn >> 16; - *ip++ = insn; + *ip++ = __opcode_to_mem_thumb16(insn >> 16); + *ip++ = __opcode_to_mem_thumb16(insn); return; } #endif - asi->insn[0] = insn; + asi->insn[0] = __opcode_to_mem_arm(insn); } /* |