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authorCatalin Marinas <catalin.marinas@arm.com>2013-04-23 11:21:44 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-04-25 13:15:38 +0100
commit6aaa189f8712471a250bfdf8fc8d08277258b8ab (patch)
treea9f763a91ad2186bcaa42eb0faa4df3945cb5f9d /arch/arm/kernel/entry-header.S
parenta0a9434dd50aac5971d63207ff1e25e69c9abdb3 (diff)
downloadop-kernel-dev-6aaa189f8712471a250bfdf8fc8d08277258b8ab.zip
op-kernel-dev-6aaa189f8712471a250bfdf8fc8d08277258b8ab.tar.gz
ARM: 7702/1: Set the page table freeing ceiling to TASK_SIZE
ARM processors with LPAE enabled use 3 levels of page tables, with an entry in the top level (pgd) covering 1GB of virtual space. Because of the branch relocation limitations on ARM, the loadable modules are mapped 16MB below PAGE_OFFSET, making the corresponding 1GB pgd shared between kernel modules and user space. If free_pgtables() is called with the default ceiling 0, free_pgd_range() (and subsequently called functions) also frees the page table shared between user space and kernel modules (which is normally handled by the ARM-specific pgd_free() function). This patch changes defines the ARM USER_PGTABLES_CEILING to TASK_SIZE when CONFIG_ARM_LPAE is enabled. Note that the pgd_free() function already checks the presence of the shared pmd page allocated by pgd_alloc() and frees it, though with ceiling 0 this wasn't necessary. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Hugh Dickins <hughd@google.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: <stable@vger.kernel.org> # 3.3+ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-header.S')
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