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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-05-25 20:58:00 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-05-28 19:39:27 +0100
commitbac4e960b5ce2453d862beaf20e59aa68af3b43a (patch)
tree69ba3b450a769fa4a613a1f8c4e6454cdcfae5aa /arch/arm/kernel/entry-armv.S
parent290815710b51de23f9ed6799d3e0bb762d4f907c (diff)
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op-kernel-dev-bac4e960b5ce2453d862beaf20e59aa68af3b43a.tar.gz
[ARM] barriers: improve xchg, bitops and atomic SMP barriers
Mathieu Desnoyers pointed out that the ARM barriers were lacking: - cmpxchg, xchg and atomic add return need memory barriers on architectures which can reorder the relative order in which memory read/writes can be seen between CPUs, which seems to include recent ARM architectures. Those barriers are currently missing on ARM. - test_and_xxx_bit were missing SMP barriers. So put these barriers in. Provide separate atomic_add/atomic_sub operations which do not require barriers. Reported-Reviewed-and-Acked-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-armv.S')
-rw-r--r--arch/arm/kernel/entry-armv.S5
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index d662a2f..83b1da6 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -815,10 +815,7 @@ __kuser_helper_start:
*/
__kuser_memory_barrier: @ 0xffff0fa0
-
-#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_SMP)
- mcr p15, 0, r0, c7, c10, 5 @ dmb
-#endif
+ smp_dmb
usr_ret lr
.align 5
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