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authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-22 09:56:51 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-22 09:56:51 -0800
commit7fa850ab4fc992717b3cc6284d3445c88978ca7e (patch)
tree3d5bef4812e3881d602a437d9a266b2a79214bb5 /arch/arm/include
parentc874e6fc3596322b0248df3158dd9d5f43a958d0 (diff)
parent0c403462d6822227ea37fb0293a3e9f511e6929f (diff)
downloadop-kernel-dev-7fa850ab4fc992717b3cc6284d3445c88978ca7e.zip
op-kernel-dev-7fa850ab4fc992717b3cc6284d3445c88978ca7e.tar.gz
Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King: "Some small fixes for this merge window, most of them quite self explanatory - the biggest thing here is a fix for the ARMv7 LPAE suspend/resume support" * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7894/1: kconfig: select GENERIC_CLOCKEVENTS if HAVE_ARM_ARCH_TIMER ARM: 7893/1: bitops: only emit .arch_extension mp if CONFIG_SMP ARM: 7892/1: Fix warning for V7M builds ARM: 7888/1: seccomp: not compatible with ARM OABI ARM: 7886/1: make OABI default to off ARM: 7885/1: Save/Restore 64-bit TTBR registers on LPAE suspend/resume ARM: 7884/1: mm: Fix ECC mem policy printk ARM: 7883/1: fix mov to mvn conversion in case of 64 bit phys_addr_t and BE ARM: 7882/1: mm: fix __phys_to_virt to work with 64 bit phys_addr_t in BE case ARM: 7881/1: __fixup_smp read of SCU config should do byteswap in BE case ARM: Fix nommu.c build warning
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/memory.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 4dd2145..9ecccc8 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -226,7 +226,14 @@ static inline phys_addr_t __virt_to_phys(unsigned long x)
static inline unsigned long __phys_to_virt(phys_addr_t x)
{
unsigned long t;
- __pv_stub(x, t, "sub", __PV_BITS_31_24);
+
+ /*
+ * 'unsigned long' cast discard upper word when
+ * phys_addr_t is 64 bit, and makes sure that inline
+ * assembler expression receives 32 bit argument
+ * in place where 'r' 32 bit operand is expected.
+ */
+ __pv_stub((unsigned long) x, t, "sub", __PV_BITS_31_24);
return t;
}
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