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author | Catalin Marinas <catalin.marinas@arm.com> | 2009-05-30 14:00:15 +0100 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2009-05-30 14:00:15 +0100 |
commit | d71e1352e240dea32d481ad8d662e8de4406ac7e (patch) | |
tree | 823bd3c503988520319b4658d1f2a8b8b4cb1328 /arch/arm/include | |
parent | ba3c02636a0743a62cb50b920d36e1c046ab88cf (diff) | |
download | op-kernel-dev-d71e1352e240dea32d481ad8d662e8de4406ac7e.zip op-kernel-dev-d71e1352e240dea32d481ad8d662e8de4406ac7e.tar.gz |
Clear the IT state when invoking a Thumb-2 signal handler
If a process is interrupted during an If-Then block and a signal is
invoked, the ITSTATE bits must be cleared otherwise the handler would
not run correctly.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Joseph S. Myers <joseph@codesourcery.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/ptrace.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h index 236a06b..4a4290f 100644 --- a/arch/arm/include/asm/ptrace.h +++ b/arch/arm/include/asm/ptrace.h @@ -65,6 +65,13 @@ #define PSR_x 0x0000ff00 /* Extension */ #define PSR_c 0x000000ff /* Control */ +/* + * ARMv7 groups of APSR bits + */ +#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */ +#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */ +#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */ + #ifndef __ASSEMBLY__ /* |