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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-27 15:14:26 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-27 15:14:26 -0700
commitcea8f46c36c3f82860b038aa23a46e16757666ba (patch)
treee09dc37d2b6880d86dac09afbc0c686139d86df0 /arch/arm/include/asm/word-at-a-time.h
parentc1e7179a38919f02dd950801529176b72f5e5a8a (diff)
parent91b006def384d8f07f9f324ab211fefe2b085c90 (diff)
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op-kernel-dev-cea8f46c36c3f82860b038aa23a46e16757666ba.tar.gz
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM updates from Russell King: "First ARM push of this merge window, post me coming back from holiday. This is what has been in linux-next for the last few weeks. Not much to say which isn't described by the commit summaries." * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (32 commits) ARM: 7463/1: topology: Update cpu_power according to DT information ARM: 7462/1: topology: factorize the update of sibling masks ARM: 7461/1: topology: Add arch_scale_freq_power function ARM: 7456/1: ptrace: provide separate functions for tracing syscall {entry,exit} ARM: 7455/1: audit: move syscall auditing until after ptrace SIGTRAP handling ARM: 7454/1: entry: don't bother with syscall tracing on ret_from_fork path ARM: 7453/1: audit: only allow syscall auditing for pure EABI userspace ARM: 7452/1: delay: allow timer-based delay implementation to be selected ARM: 7451/1: arch timer: implement read_current_timer and get_cycles ARM: 7450/1: dcache: select DCACHE_WORD_ACCESS for little-endian ARMv6+ CPUs ARM: 7449/1: use generic strnlen_user and strncpy_from_user functions ARM: 7448/1: perf: remove arm_perf_pmu_ids global enumeration ARM: 7447/1: rwlocks: remove unused branch labels from trylock routines ARM: 7446/1: spinlock: use ticket algorithm for ARMv6+ locking implementation ARM: 7445/1: mm: update CONTEXTIDR register to contain PID of current process ARM: 7444/1: kernel: add arch-timer C3STOP feature ARM: 7460/1: remove asm/locks.h ARM: 7439/1: head.S: simplify initial page table mapping ARM: 7437/1: zImage: Allow DTB command line concatenation with ATAG_CMDLINE ARM: 7436/1: Do not map the vectors page as write-through on UP systems ...
Diffstat (limited to 'arch/arm/include/asm/word-at-a-time.h')
-rw-r--r--arch/arm/include/asm/word-at-a-time.h96
1 files changed, 96 insertions, 0 deletions
diff --git a/arch/arm/include/asm/word-at-a-time.h b/arch/arm/include/asm/word-at-a-time.h
new file mode 100644
index 0000000..4d52f92
--- /dev/null
+++ b/arch/arm/include/asm/word-at-a-time.h
@@ -0,0 +1,96 @@
+#ifndef __ASM_ARM_WORD_AT_A_TIME_H
+#define __ASM_ARM_WORD_AT_A_TIME_H
+
+#ifndef __ARMEB__
+
+/*
+ * Little-endian word-at-a-time zero byte handling.
+ * Heavily based on the x86 algorithm.
+ */
+#include <linux/kernel.h>
+
+struct word_at_a_time {
+ const unsigned long one_bits, high_bits;
+};
+
+#define WORD_AT_A_TIME_CONSTANTS { REPEAT_BYTE(0x01), REPEAT_BYTE(0x80) }
+
+static inline unsigned long has_zero(unsigned long a, unsigned long *bits,
+ const struct word_at_a_time *c)
+{
+ unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits;
+ *bits = mask;
+ return mask;
+}
+
+#define prep_zero_mask(a, bits, c) (bits)
+
+static inline unsigned long create_zero_mask(unsigned long bits)
+{
+ bits = (bits - 1) & ~bits;
+ return bits >> 7;
+}
+
+static inline unsigned long find_zero(unsigned long mask)
+{
+ unsigned long ret;
+
+#if __LINUX_ARM_ARCH__ >= 5
+ /* We have clz available. */
+ ret = fls(mask) >> 3;
+#else
+ /* (000000 0000ff 00ffff ffffff) -> ( 1 1 2 3 ) */
+ ret = (0x0ff0001 + mask) >> 23;
+ /* Fix the 1 for 00 case */
+ ret &= mask;
+#endif
+
+ return ret;
+}
+
+#ifdef CONFIG_DCACHE_WORD_ACCESS
+
+#define zero_bytemask(mask) (mask)
+
+/*
+ * Load an unaligned word from kernel space.
+ *
+ * In the (very unlikely) case of the word being a page-crosser
+ * and the next page not being mapped, take the exception and
+ * return zeroes in the non-existing part.
+ */
+static inline unsigned long load_unaligned_zeropad(const void *addr)
+{
+ unsigned long ret, offset;
+
+ /* Load word from unaligned pointer addr */
+ asm(
+ "1: ldr %0, [%2]\n"
+ "2:\n"
+ " .pushsection .fixup,\"ax\"\n"
+ " .align 2\n"
+ "3: and %1, %2, #0x3\n"
+ " bic %2, %2, #0x3\n"
+ " ldr %0, [%2]\n"
+ " lsl %1, %1, #0x3\n"
+ " lsr %0, %0, %1\n"
+ " b 2b\n"
+ " .popsection\n"
+ " .pushsection __ex_table,\"a\"\n"
+ " .align 3\n"
+ " .long 1b, 3b\n"
+ " .popsection"
+ : "=&r" (ret), "=&r" (offset)
+ : "r" (addr), "Qo" (*(unsigned long *)addr));
+
+ return ret;
+}
+
+
+#endif /* DCACHE_WORD_ACCESS */
+
+#else /* __ARMEB__ */
+#include <asm-generic/word-at-a-time.h>
+#endif
+
+#endif /* __ASM_ARM_WORD_AT_A_TIME_H */
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