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| author | Catalin Marinas <catalin.marinas@arm.com> | 2010-05-07 16:26:24 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-05-08 10:44:30 +0100 |
| commit | f4d6477f7f073b99220386d62f5bf54bec3482cc (patch) | |
| tree | 4c6a13a762f54bfd30550a70226268edcb9d38a7 /arch/arm/include/asm/tlbflush.h | |
| parent | b5a07faadeb4e0cfd6dcee359e501d4755cab875 (diff) | |
| download | op-kernel-dev-f4d6477f7f073b99220386d62f5bf54bec3482cc.zip op-kernel-dev-f4d6477f7f073b99220386d62f5bf54bec3482cc.tar.gz | |
ARM: 6111/1: Implement read/write for ownership in the ARMv6 DMA cache ops
The Snoop Control Unit on the ARM11MPCore hardware does not detect the
cache operations and the dma_cache_maint*() functions may leave stale
cache entries on other CPUs. The solution implemented in this patch
performs a Read or Write For Ownership in the ARMv6 DMA cache
maintenance functions. These LDR/STR instructions change the cache line
state to shared or exclusive so that the cache maintenance operation has
the desired effect.
Tested-by: George G. Davis <gdavis@mvista.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/tlbflush.h')
0 files changed, 0 insertions, 0 deletions
