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authorRussell King <rmk+kernel@arm.linux.org.uk>2015-07-01 10:17:55 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2015-07-03 15:00:23 +0100
commit1e2c727f6c022778d4562147433ca4c0b101f0ad (patch)
tree6603b8b4554880e9f0f210d3ac2c2d3a18d0f84a /arch/arm/include/asm/io.h
parentac5e2f170f033e48cfcdc2c4f74b27083eabffa5 (diff)
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ARM: io: fix ioremap_wt() implementation
ioremap_wt() was added by aliasing it to ioremap_nocache(), which is a device mapping. Device mappings do not allow unaligned accesses, but it appears that GCC is able to inline its own memcpy() implementation which may use such accesses. The only user of this is pmem, which uses memcpy() on the region. Therefore, this is unsafe. We must implement ioremap_wt() correctly for ARM, or not at all. This patch adds a more correct implementation by re-using ioremap_wc() to provide a normal-memory non-cacheable mapping. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/io.h')
-rw-r--r--arch/arm/include/asm/io.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index ae10717..f1083eb 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -394,7 +394,7 @@ static inline void memcpy_toio(volatile void __iomem *to, const void *from,
#define ioremap_nocache(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE)
#define ioremap_cache(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_CACHED)
#define ioremap_wc(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_WC)
-#define ioremap_wt(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE)
+#define ioremap_wt(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_WC)
#define iounmap __arm_iounmap
/*
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