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author | Jisheng Zhang <jszhang@marvell.com> | 2014-12-31 16:57:50 +0800 |
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committer | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2015-01-07 15:18:00 +0100 |
commit | 96ed6046d3bf1113de3bdbd6dbb7f40e6d0ae0ef (patch) | |
tree | b2d06317f0608677034590323f4f849969091349 /arch/arm/boot | |
parent | 97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff) | |
download | op-kernel-dev-96ed6046d3bf1113de3bdbd6dbb7f40e6d0ae0ef.zip op-kernel-dev-96ed6046d3bf1113de3bdbd6dbb7f40e6d0ae0ef.tar.gz |
ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host
On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
The shdci2 can't work without this patch due to the "core" clk is gated.
Cc: stable@vger.kernel.org # 3.16+
Fixes: 0d859a6a9d14 ("ARM: dts: berlin: add the SDHCI nodes for the BG2Q")
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/berlin2q.dtsi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 35253c9..903f3bb 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -83,7 +83,8 @@ compatible = "mrvl,pxav3-mmc"; reg = <0xab1000 0x200>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&chip CLKID_SDIO1XIN>; + clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>; + clock-names = "io", "core"; status = "disabled"; }; |