diff options
| author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-10-18 20:02:31 -0300 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2013-10-23 11:04:31 +0000 |
| commit | f039dfb51b36a2d7e4ac25e65ffbd03e3ac77a0c (patch) | |
| tree | 55d4034cacbbf231f0efde5255d179264448a7e5 /arch/arm/boot | |
| parent | 4675cf577e4bbe179df1cf10a6fab8854333d99d (diff) | |
| download | op-kernel-dev-f039dfb51b36a2d7e4ac25e65ffbd03e3ac77a0c.zip op-kernel-dev-f039dfb51b36a2d7e4ac25e65ffbd03e3ac77a0c.tar.gz | |
ARM: mvebu: Add the core-divider clock to Armada 370/XP
The Armada 370/XP SoC has a clock provider called "Core Divider",
that is derived from a fixed 2 GHz PLL clock.
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/armada-370-xp.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index 13efe05..00d6a79 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -138,6 +138,14 @@ status = "disabled"; }; + coredivclk: corediv-clock@18740 { + compatible = "marvell,armada-370-corediv-clock"; + reg = <0x18740 0xc>; + #clock-cells = <1>; + clocks = <&mainpll>; + clock-output-names = "nand"; + }; + timer@20300 { reg = <0x20300 0x30>, <0x21040 0x30>; interrupts = <37>, <38>, <39>, <40>, <5>, <6>; |
