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author | Simon Xue <xxm@rock-chips.com> | 2017-07-24 10:32:08 +0800 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2017-08-21 23:16:36 +0200 |
commit | 4e1b222d8088804a5db0e34d71a2b17e6c141dee (patch) | |
tree | 282bb7c79b01963516540db06b6d71c1e67c1745 /arch/arm/boot | |
parent | 684bcba8eccc59949a70287c5491e20e12359376 (diff) | |
download | op-kernel-dev-4e1b222d8088804a5db0e34d71a2b17e6c141dee.zip op-kernel-dev-4e1b222d8088804a5db0e34d71a2b17e6c141dee.tar.gz |
ARM: dts: rockchip: add rk322x iommu nodes
Add VPU/VDEC/VOP/IEP iommu nodes
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/rk322x.dtsi | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 1c43dea..0681442 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -558,6 +558,42 @@ status = "disabled"; }; + vpu_mmu: iommu@20020800 { + compatible = "rockchip,iommu"; + reg = <0x20020800 0x100>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "vpu_mmu"; + iommu-cells = <0>; + status = "disabled"; + }; + + vdec_mmu: iommu@20030480 { + compatible = "rockchip,iommu"; + reg = <0x20030480 0x40>, <0x200304c0 0x40>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "vdec_mmu"; + iommu-cells = <0>; + status = "disabled"; + }; + + vop_mmu: iommu@20053f00 { + compatible = "rockchip,iommu"; + reg = <0x20053f00 0x100>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "vop_mmu"; + iommu-cells = <0>; + status = "disabled"; + }; + + iep_mmu: iommu@20070800 { + compatible = "rockchip,iommu"; + reg = <0x20070800 0x100>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "iep_mmu"; + iommu-cells = <0>; + status = "disabled"; + }; + sdmmc: dwmmc@30000000 { compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x30000000 0x4000>; |