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| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2016-04-18 11:41:30 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-04-25 14:10:09 +1000 |
| commit | 21c7d0fcbe10a1a81fb791a9bdcca2381bc16c15 (patch) | |
| tree | 48a4f0ac282e918e6311a75870e3225fd18b59b5 /arch/arm/boot | |
| parent | 7e2a1bcd2185c9d7d4c9b2910249a1a8fa841341 (diff) | |
| download | op-kernel-dev-21c7d0fcbe10a1a81fb791a9bdcca2381bc16c15.zip op-kernel-dev-21c7d0fcbe10a1a81fb791a9bdcca2381bc16c15.tar.gz | |
ARM: dts: r8a7790: fix max-frequency for SDHI
The wrong values come from an old datasheet (H2 v0.6). Anything later
has the fixed value of 195MHz (H2 v0.7 up to Gen2-common V2.0).
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/r8a7790.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index b920fac..776a2ae 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -589,7 +589,7 @@ clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; dmas = <&dmac1 0xcd>, <&dmac1 0xce>; dma-names = "tx", "rx"; - max-frequency = <156000000>; + max-frequency = <195000000>; power-domains = <&cpg_clocks>; status = "disabled"; }; @@ -601,7 +601,7 @@ clocks = <&mstp3_clks R8A7790_CLK_SDHI1>; dmas = <&dmac1 0xc9>, <&dmac1 0xca>; dma-names = "tx", "rx"; - max-frequency = <156000000>; + max-frequency = <195000000>; power-domains = <&cpg_clocks>; status = "disabled"; }; |
