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author | Caesar Wang <wxt@rock-chips.com> | 2015-10-23 19:25:28 +0800 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2015-11-19 05:50:42 +0100 |
commit | 784359b824bf2b095b257eefcd9615a3c48f2d8a (patch) | |
tree | 19dfb4cf28bef7644a403d58c004c1ad5fc1d662 /arch/arm/boot/dts | |
parent | 984926781122f034d5bc9962815d135b6c4a8e1d (diff) | |
download | op-kernel-dev-784359b824bf2b095b257eefcd9615a3c48f2d8a.zip op-kernel-dev-784359b824bf2b095b257eefcd9615a3c48f2d8a.tar.gz |
ARM: dts: rockchip: Add OTP gpio pinctrl to rk3288 tsadc node
Add the "init" anf "sleep" pinctrl as the OTP gpio state.
We need the OTP pin is gpio state before resetting the TSADC controller,
since the tshut polarity will generate a high signal.
"init" pinctrl property is defined by Doug's Patch[0].
Patch[0]:
https://patchwork.kernel.org/patch/7454311/
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 6a79c9c..04ea209 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -452,8 +452,10 @@ clock-names = "tsadc", "apb_pclk"; resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; - pinctrl-names = "default"; - pinctrl-0 = <&otp_out>; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; + pinctrl-2 = <&otp_gpio>; #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; status = "disabled"; @@ -1395,6 +1397,10 @@ }; tsadc { + otp_gpio: otp-gpio { + rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>; + }; + otp_out: otp-out { rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>; }; |