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author | Philipp Zabel <p.zabel@pengutronix.de> | 2013-03-28 17:35:23 +0100 |
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committer | Shawn Guo <shawn.guo@linaro.org> | 2013-04-09 22:52:57 +0800 |
commit | 8d84c3740fb0c97b5b01ad565f9d4e2ca84bf670 (patch) | |
tree | 979e8441375a73b206d636e7f5a096e1a03e2af5 /arch/arm/boot/dts | |
parent | 09ebf366599d691ef25c343cb66fe19ce2a74d52 (diff) | |
download | op-kernel-dev-8d84c3740fb0c97b5b01ad565f9d4e2ca84bf670.zip op-kernel-dev-8d84c3740fb0c97b5b01ad565f9d4e2ca84bf670.tar.gz |
ARM i.MX5: Add system reset controller (SRC) to i.MX51 and i.MX53 device tree
Also, link SRC to IPU via phandle.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/imx51.dtsi | 7 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53.dtsi | 7 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 76d84a4..0f6d331 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -70,6 +70,7 @@ interrupts = <11 10>; clocks = <&clks 59>, <&clks 110>, <&clks 61>; clock-names = "bus", "di0", "di1"; + resets = <&src 2>; }; aips@70000000 { /* AIPS1 */ @@ -529,6 +530,12 @@ status = "disabled"; }; + src: src@73fd0000 { + compatible = "fsl,imx51-src"; + reg = <0x73fd0000 0x4000>; + #reset-cells = <1>; + }; + clks: ccm@73fd4000{ compatible = "fsl,imx51-ccm"; reg = <0x73fd4000 0x4000>; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index d98350e..845982e 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -75,6 +75,7 @@ interrupts = <11 10>; clocks = <&clks 59>, <&clks 110>, <&clks 61>; clock-names = "bus", "di0", "di1"; + resets = <&src 2>; }; aips@50000000 { /* AIPS1 */ @@ -601,6 +602,12 @@ status = "disabled"; }; + src: src@53fd0000 { + compatible = "fsl,imx53-src", "fsl,imx51-src"; + reg = <0x53fd0000 0x4000>; + #reset-cells = <1>; + }; + clks: ccm@53fd4000{ compatible = "fsl,imx53-ccm"; reg = <0x53fd4000 0x4000>; |