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authorPeter Crosthwaite <crosthwaitepeter@gmail.com>2014-12-01 10:25:49 +1000
committerMichal Simek <michal.simek@xilinx.com>2014-12-01 09:22:50 +0100
commit8c7634c0ee4e2b62a361cc0285418e201d162f37 (patch)
tree32c12892e63dc8d908fca8247e3dabff103a4dec /arch/arm/boot/dts/zynq-7000.dtsi
parentd86e3104e8066a5412ad3f9790592477a947a77e (diff)
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arm: dts: zynq: Move crystal freq. to board level
The fact that all supported boards use the same 33MHz crystal is a co-incidence. The Zynq PS support a range of crystal freqs so the hardcoded setting should be removed from the dtsi. Re-implement it on the board level. This prepares support for Zynq boards with different crystal frequencies (e.g. the Digilent ZYBO). Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/boot/dts/zynq-7000.dtsi')
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 24036c4..f8e4a28 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -244,7 +244,6 @@
clkc: clkc@100 {
#clock-cells = <1>;
compatible = "xlnx,ps7-clkc";
- ps-clk-frequency = <33333333>;
fclk-enable = <0>;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
"cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
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